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-rw-r--r--src/mainboard/google/dedede/variants/baseboard/devicetree.cb1
-rw-r--r--src/mainboard/google/dedede/variants/kracko/overridetree.cb2
-rw-r--r--src/mainboard/google/dedede/variants/kracko/ramstage.c6
3 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index bca948e9d5..c38aa73511 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -9,6 +9,7 @@ fw_config
option DB_PORTS_1C_1A_LTE 6
option DB_PORTS_1C 7
option DB_PORTS_1A_HDMI_LTE 8
+ option DB_PORTS_LTE 9
end
field STYLUS 4
option STYLUS_ABSENT 0
diff --git a/src/mainboard/google/dedede/variants/kracko/overridetree.cb b/src/mainboard/google/dedede/variants/kracko/overridetree.cb
index 2c25e60a1b..ae70769f8a 100644
--- a/src/mainboard/google/dedede/variants/kracko/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/kracko/overridetree.cb
@@ -131,6 +131,7 @@ chip soc/intel/jasperlake
register "enable_delay_ms" = "20"
device usb 2.3 on
probe DB_PORTS DB_PORTS_1C_LTE
+ probe DB_PORTS DB_PORTS_LTE
end
end
chip drivers/usb/acpi
@@ -175,6 +176,7 @@ chip soc/intel/jasperlake
register "group" = "ACPI_PLD_GROUP(2, 2)"
device usb 3.3 on
probe DB_PORTS DB_PORTS_1C_LTE
+ probe DB_PORTS DB_PORTS_LTE
end
end
chip drivers/usb/acpi
diff --git a/src/mainboard/google/dedede/variants/kracko/ramstage.c b/src/mainboard/google/dedede/variants/kracko/ramstage.c
index 459fc77dc1..afd218e637 100644
--- a/src/mainboard/google/dedede/variants/kracko/ramstage.c
+++ b/src/mainboard/google/dedede/variants/kracko/ramstage.c
@@ -24,6 +24,12 @@ static void usb_port_update(void)
cfg->usb2_ports[3].enable = 0;
cfg->usb3_ports[3].enable = 0;
}
+ if (fw_config_is_provisioned() &&
+ fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_LTE))) {
+ /* Disable USB C1 port */
+ cfg->usb2_ports[1].enable = 0;
+ cfg->usb3_ports[1].enable = 0;
+ }
}
void variant_devtree_update(void)