diff options
| -rw-r--r-- | src/mainboard/amd/thatcher/romstage.c | 2 | ||||
| -rw-r--r-- | src/superio/smsc/lpc47n217/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/superio/smsc/lpc47n217/early_serial.c | 2 | ||||
| -rw-r--r-- | src/superio/smsc/lpc47n217/lpc47n217.h | 5 |
4 files changed, 8 insertions, 2 deletions
diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c index 10b7df13e5..4c9c8fa1b3 100644 --- a/src/mainboard/amd/thatcher/romstage.c +++ b/src/mainboard/amd/thatcher/romstage.c @@ -30,7 +30,7 @@ #include <cpu/x86/bist.h> #include <cpu/x86/lapic.h> #include <southbridge/amd/agesa/hudson/hudson.h> -#include <superio/smsc/lpc47n217/early_serial.c> +#include <superio/smsc/lpc47n217/lpc47n217.h> #include <cpu/amd/agesa/s3_resume.h> #include "cbmem.h" diff --git a/src/superio/smsc/lpc47n217/Makefile.inc b/src/superio/smsc/lpc47n217/Makefile.inc index f3c5ad4697..0bff637a2b 100644 --- a/src/superio/smsc/lpc47n217/Makefile.inc +++ b/src/superio/smsc/lpc47n217/Makefile.inc @@ -14,4 +14,5 @@ ## GNU General Public License for more details. ## +romstage-$(CONFIG_SUPERIO_SMSC_LPC47N217) += early_serial.c ramstage-$(CONFIG_SUPERIO_SMSC_LPC47N217) += superio.c diff --git a/src/superio/smsc/lpc47n217/early_serial.c b/src/superio/smsc/lpc47n217/early_serial.c index dfe06b9082..454d77f046 100644 --- a/src/superio/smsc/lpc47n217/early_serial.c +++ b/src/superio/smsc/lpc47n217/early_serial.c @@ -105,7 +105,7 @@ static void lpc47n217_pnp_set_enable(pnp_devfn_t dev, int enable) * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. * @param iobase Processor I/O port address to assign to this serial device. */ -static void lpc47n217_enable_serial(pnp_devfn_t dev, u16 iobase) +void lpc47n217_enable_serial(pnp_devfn_t dev, u16 iobase) { /* * NOTE: Cannot use pnp_set_XXX() here because they assume chip diff --git a/src/superio/smsc/lpc47n217/lpc47n217.h b/src/superio/smsc/lpc47n217/lpc47n217.h index 20689d189a..1cae5a08b2 100644 --- a/src/superio/smsc/lpc47n217/lpc47n217.h +++ b/src/superio/smsc/lpc47n217/lpc47n217.h @@ -17,6 +17,9 @@ #ifndef SUPERIO_SMSC_LPC47N217_LPC47N217_H #define SUPERIO_SMSC_LPC47N217_LPC47N217_H +#include <arch/io.h> +#include <stdint.h> + /* * These are arbitrary, but must match declarations in the mainboard * devicetree.cb file. Values chosen to match SMSC LPC47B37x. @@ -27,4 +30,6 @@ #define LPC47N217_MAX_CONFIG_REGISTER 0x39 +void lpc47n217_enable_serial(pnp_devfn_t dev, u16 iobase); + #endif |