diff options
| -rw-r--r-- | src/mainboard/intel/adlrvp/devicetree_m.cb | 4 | ||||
| -rw-r--r-- | src/mainboard/intel/adlrvp/gpio_m.c | 4 |
2 files changed, 7 insertions, 1 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb index ae248429a9..4d32ce9135 100644 --- a/src/mainboard/intel/adlrvp/devicetree_m.cb +++ b/src/mainboard/intel/adlrvp/devicetree_m.cb @@ -86,6 +86,10 @@ chip soc/intel/alderlake [DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, }" + # Disable DDI ports HPD + register "DdiPort1Hpd" = "0" + register "DdiPort2Hpd" = "0" + # TCSS USB3 register "TcssAuxOri" = "0" diff --git a/src/mainboard/intel/adlrvp/gpio_m.c b/src/mainboard/intel/adlrvp/gpio_m.c index 6f89fd2240..d5eeffa1c4 100644 --- a/src/mainboard/intel/adlrvp/gpio_m.c +++ b/src/mainboard/intel/adlrvp/gpio_m.c @@ -110,7 +110,9 @@ static const struct pad_config gpio_table[] = { /* HPD_1 (E14) and HPD_2 (A18) pins */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), - PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), + + PAD_NC(GPP_A19, NONE), + PAD_NC(GPP_A20, NONE), /* GPIO pin for PCIE SRCCLKREQB */ PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), |