diff options
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/devicetree.cb | 5 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/brya0/overridetree.cb | 4 |
2 files changed, 5 insertions, 4 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/devicetree.cb index a0941a74f5..8717e70a11 100644 --- a/src/mainboard/google/brya/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/devicetree.cb @@ -3,6 +3,11 @@ chip soc/intel/alderlake device lapic 0 on end end + # GPE configuration + register "pmc_gpe0_dw0" = "GPP_A" + register "pmc_gpe0_dw1" = "GPP_E" + register "pmc_gpe0_dw2" = "GPP_F" + # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f register "gen1_dec" = "0x00fc0801" register "gen2_dec" = "0x000c0201" diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index 3ae3d80ab7..b115aeb6d7 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -1,8 +1,4 @@ chip soc/intel/alderlake - register "pmc_gpe0_dw0" = "GPP_A" - register "pmc_gpe0_dw1" = "GPP_E" - register "pmc_gpe0_dw2" = "GPP_F" - register "SaGv" = "SaGv_Disabled" register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port |