diff options
| -rw-r--r-- | src/soc/intel/meteorlake/Kconfig | 3 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/include/soc/itss.h | 2 |
2 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index 8c4158ba70..c70e472d73 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -142,8 +142,7 @@ config HEAP_SIZE hex default 0x10000 -# Intel recommends reserving the following resources per PCIe TBT root port, -# from ADL BIOS Spec (doc #627270) Revision 0.6.0 Section 7.2.5.1.5 +# Intel recommends reserving the PCIe TBT root port resources as below: # - 42 buses # - 194 MiB Non-prefetchable memory # - 448 MiB Prefetchable memory diff --git a/src/soc/intel/meteorlake/include/soc/itss.h b/src/soc/intel/meteorlake/include/soc/itss.h index 74ee5ab8c8..a0347d6063 100644 --- a/src/soc/intel/meteorlake/include/soc/itss.h +++ b/src/soc/intel/meteorlake/include/soc/itss.h @@ -10,4 +10,4 @@ #define IRQS_PER_IPC 32 #define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC) -#endif /* SOC_INTEL_ADL_ITSS_H */ +#endif /* SOC_INTEL_MTL_ITSS_H */ |