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-rw-r--r--src/mainboard/google/guybrush/Kconfig1
-rw-r--r--src/mainboard/google/guybrush/mainboard.c12
2 files changed, 1 insertions, 12 deletions
diff --git a/src/mainboard/google/guybrush/Kconfig b/src/mainboard/google/guybrush/Kconfig
index 77d2537ee4..9dd264aeb0 100644
--- a/src/mainboard/google/guybrush/Kconfig
+++ b/src/mainboard/google/guybrush/Kconfig
@@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS
def_bool y
select AMD_SOC_CONSOLE_UART
select BOARD_ROMSIZE_KB_16384
+ select DISABLE_KEYBOARD_RESET_PIN
select DISABLE_SPI_FLASH_ROM_SHARING
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
diff --git a/src/mainboard/google/guybrush/mainboard.c b/src/mainboard/google/guybrush/mainboard.c
index ffa682218d..72ad7a8a0f 100644
--- a/src/mainboard/google/guybrush/mainboard.c
+++ b/src/mainboard/google/guybrush/mainboard.c
@@ -1,11 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
-#include <amdblocks/acpimmio.h>
#include <amdblocks/amd_pci_util.h>
#include <baseboard/variants.h>
#include <device/device.h>
#include <soc/acpi.h>
-#include <soc/southbridge.h>
#include <variant/ec.h>
#include <vendorcode/google/chromeos/chromeos.h>
@@ -90,16 +88,6 @@ static void mainboard_configure_gpios(void)
{
size_t base_num_gpios, override_num_gpios;
const struct soc_amd_gpio *base_gpios, *override_gpios;
- u32 reg;
-
- /*
- * Disable KBRST feature
- * KBRSTEN is set to 1 on reset and this causes system reset
- * if GPIO 129 is configured as GPO_LOW.
- * */
- reg = pm_read8(PM_RST_CTRL1);
- reg &= ~KBRSTEN;
- pm_write8(PM_RST_CTRL1, reg);
base_gpios = variant_base_gpio_table(&base_num_gpios);
override_gpios = variant_override_gpio_table(&override_num_gpios);