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-rw-r--r--src/mainboard/google/asurada/mainboard.c18
-rw-r--r--src/mainboard/google/cherry/mainboard.c18
-rw-r--r--src/mainboard/google/corsola/mainboard.c18
-rw-r--r--src/mainboard/google/kukui/mainboard.c18
-rw-r--r--src/soc/mediatek/common/bl31.c23
-rw-r--r--src/soc/mediatek/common/include/soc/bl31.h10
-rw-r--r--src/soc/mediatek/mt8183/Makefile.inc1
-rw-r--r--src/soc/mediatek/mt8186/Makefile.inc1
-rw-r--r--src/soc/mediatek/mt8192/Makefile.inc1
-rw-r--r--src/soc/mediatek/mt8195/Makefile.inc1
10 files changed, 49 insertions, 60 deletions
diff --git a/src/mainboard/google/asurada/mainboard.c b/src/mainboard/google/asurada/mainboard.c
index bbca4b83ba..ddc2be4e53 100644
--- a/src/mainboard/google/asurada/mainboard.c
+++ b/src/mainboard/google/asurada/mainboard.c
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <bl31.h>
#include <bootmode.h>
#include <console/console.h>
#include <delay.h>
@@ -10,6 +9,7 @@
#include <edid.h>
#include <framebuffer_info.h>
#include <gpio.h>
+#include <soc/bl31.h>
#include <soc/ddp.h>
#include <soc/dpm.h>
#include <soc/dsi.h>
@@ -24,8 +24,6 @@
#include "gpio.h"
-#include <arm-trusted-firmware/include/export/plat/mediatek/common/plat_params_exp.h>
-
#define MSDC0_BASE 0x11f60000
#define MSDC0_TOP_BASE 0x11f50000
@@ -53,17 +51,6 @@
#define GPIO_AP_EDP_BKLTEN GPIO(KPROW1) /* 152 */
#define GPIO_BL_PWM_1V8 GPIO(DISP_PWM) /* 40 */
-static void register_reset_to_bl31(void)
-{
- static struct bl_aux_param_gpio param_reset = {
- .h = { .type = BL_AUX_PARAM_MTK_RESET_GPIO },
- .gpio = { .polarity = ARM_TF_GPIO_LEVEL_HIGH },
- };
-
- param_reset.gpio.index = GPIO_RESET.id;
- register_bl31_aux_param(&param_reset.h);
-}
-
/* Override hs_da_trail for ANX7625 */
void mtk_dsi_override_phy_timing(struct mtk_phy_timing *timing)
{
@@ -161,7 +148,8 @@ static void mainboard_init(struct device *dev)
configure_audio();
setup_usb_host();
- register_reset_to_bl31();
+ if (CONFIG(ARM64_USE_ARM_TRUSTED_FIRMWARE))
+ register_reset_to_bl31(GPIO_RESET.id, true);
if (dpm_init())
printk(BIOS_ERR, "dpm init fail, system can't do DVFS switch\n");
diff --git a/src/mainboard/google/cherry/mainboard.c b/src/mainboard/google/cherry/mainboard.c
index b69403eb1e..c67a581c77 100644
--- a/src/mainboard/google/cherry/mainboard.c
+++ b/src/mainboard/google/cherry/mainboard.c
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <bl31.h>
#include <boardid.h>
#include <bootmode.h>
#include <console/console.h>
@@ -10,6 +9,7 @@
#include <edid.h>
#include <framebuffer_info.h>
#include <gpio.h>
+#include <soc/bl31.h>
#include <soc/ddp.h>
#include <soc/dpm.h>
#include <soc/dptx.h>
@@ -23,8 +23,6 @@
#include "gpio.h"
-#include <arm-trusted-firmware/include/export/plat/mediatek/common/plat_params_exp.h>
-
/* GPIO to schematics names */
#define GPIO_AP_EDP_BKLTEN GPIO(DGI_D5)
#define GPIO_BL_PWM_1V8 GPIO(DISP_PWM0)
@@ -57,17 +55,6 @@ bool mainboard_needs_pcie_init(void)
}
}
-static void register_reset_to_bl31(void)
-{
- static struct bl_aux_param_gpio param_reset = {
- .h = { .type = BL_AUX_PARAM_MTK_RESET_GPIO },
- .gpio = { .polarity = ARM_TF_GPIO_LEVEL_HIGH },
- };
-
- param_reset.gpio.index = GPIO_RESET.id;
- register_bl31_aux_param(&param_reset.h);
-}
-
/* Set up backlight control pins as output pin and power-off by default */
static void configure_panel_backlight(void)
{
@@ -160,7 +147,8 @@ static void mainboard_init(struct device *dev)
if (spm_init())
printk(BIOS_ERR, "spm init failed, system suspend may not work\n");
- register_reset_to_bl31();
+ if (CONFIG(ARM64_USE_ARM_TRUSTED_FIRMWARE))
+ register_reset_to_bl31(GPIO_RESET.id, true);
}
static void mainboard_enable(struct device *dev)
diff --git a/src/mainboard/google/corsola/mainboard.c b/src/mainboard/google/corsola/mainboard.c
index c0a6449b39..3efedf8db8 100644
--- a/src/mainboard/google/corsola/mainboard.c
+++ b/src/mainboard/google/corsola/mainboard.c
@@ -1,10 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <bl31.h>
#include <bootmode.h>
#include <console/console.h>
#include <device/device.h>
#include <gpio.h>
+#include <soc/bl31.h>
#include <soc/msdc.h>
#include <soc/spm.h>
#include <soc/usb.h>
@@ -12,19 +12,6 @@
#include "display.h"
#include "gpio.h"
-#include <arm-trusted-firmware/include/export/plat/mediatek/common/plat_params_exp.h>
-
-static void register_reset_to_bl31(void)
-{
- static struct bl_aux_param_gpio param_reset = {
- .h = { .type = BL_AUX_PARAM_MTK_RESET_GPIO },
- .gpio = { .polarity = ARM_TF_GPIO_LEVEL_HIGH },
- };
-
- param_reset.gpio.index = GPIO_RESET.id;
- register_bl31_aux_param(&param_reset.h);
-}
-
static void configure_audio(void)
{
mtcmos_audio_power_on();
@@ -54,7 +41,8 @@ static void mainboard_init(struct device *dev)
if (spm_init())
printk(BIOS_ERR, "spm init failed, system suspend may not work\n");
- register_reset_to_bl31();
+ if (CONFIG(ARM64_USE_ARM_TRUSTED_FIRMWARE))
+ register_reset_to_bl31(GPIO_RESET.id, true);
if (display_init_required()) {
if (configure_display() < 0)
diff --git a/src/mainboard/google/kukui/mainboard.c b/src/mainboard/google/kukui/mainboard.c
index 9357b67468..a0ce67400a 100644
--- a/src/mainboard/google/kukui/mainboard.c
+++ b/src/mainboard/google/kukui/mainboard.c
@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <assert.h>
-#include <bl31.h>
#include <boardid.h>
#include <bootmode.h>
#include <cbfs.h>
@@ -12,6 +11,7 @@
#include <edid.h>
#include <framebuffer_info.h>
#include <gpio.h>
+#include <soc/bl31.h>
#include <soc/ddp.h>
#include <soc/dsi.h>
#include <soc/gpio.h>
@@ -24,8 +24,6 @@
#include "gpio.h"
#include "panel.h"
-#include <arm-trusted-firmware/include/export/plat/mediatek/common/plat_params_exp.h>
-
static void configure_emmc(void)
{
const gpio_t emmc_pin[] = {
@@ -181,17 +179,6 @@ static bool configure_display(void)
return true;
}
-static void register_reset_to_bl31(void)
-{
- static struct bl_aux_param_gpio param_reset = {
- .h = { .type = BL_AUX_PARAM_MTK_RESET_GPIO },
- .gpio = { .polarity = ARM_TF_GPIO_LEVEL_HIGH },
- };
-
- param_reset.gpio.index = GPIO_RESET.id;
- register_bl31_aux_param(&param_reset.h);
-}
-
static void mainboard_init(struct device *dev)
{
if (display_init_required()) {
@@ -211,7 +198,8 @@ static void mainboard_init(struct device *dev)
printk(BIOS_ERR,
"SPM initialization failed, suspend/resume may fail.\n");
- register_reset_to_bl31();
+ if (CONFIG(ARM64_USE_ARM_TRUSTED_FIRMWARE))
+ register_reset_to_bl31(GPIO_RESET.id, true);
}
static void mainboard_enable(struct device *dev)
diff --git a/src/soc/mediatek/common/bl31.c b/src/soc/mediatek/common/bl31.c
new file mode 100644
index 0000000000..6a790982e2
--- /dev/null
+++ b/src/soc/mediatek/common/bl31.c
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bl31.h>
+#include <console/console.h>
+#include <gpio.h>
+#include <soc/bl31.h>
+
+#include <arm-trusted-firmware/include/export/plat/mediatek/common/plat_params_exp.h>
+
+void register_reset_to_bl31(int gpio_index, bool active_high)
+{
+ static struct bl_aux_param_gpio param_reset = {
+ .h = { .type = BL_AUX_PARAM_MTK_RESET_GPIO },
+ };
+
+ if (active_high)
+ param_reset.gpio.polarity = ARM_TF_GPIO_LEVEL_HIGH;
+ else
+ param_reset.gpio.polarity = ARM_TF_GPIO_LEVEL_LOW;
+
+ param_reset.gpio.index = gpio_index;
+ register_bl31_aux_param(&param_reset.h);
+}
diff --git a/src/soc/mediatek/common/include/soc/bl31.h b/src/soc/mediatek/common/include/soc/bl31.h
new file mode 100644
index 0000000000..c596a8577b
--- /dev/null
+++ b/src/soc/mediatek/common/include/soc/bl31.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
+
+#ifndef _SOC_BL31_H_
+#define _SOC_BL31_H_
+
+#include <stdbool.h>
+
+void register_reset_to_bl31(int gpio_index, bool active_high);
+
+#endif /* _SOC_BL31_H_ */
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc
index 2cf813316b..6a71cd6b22 100644
--- a/src/soc/mediatek/mt8183/Makefile.inc
+++ b/src/soc/mediatek/mt8183/Makefile.inc
@@ -44,6 +44,7 @@ romstage-y += ../common/timer.c
romstage-y += ../common/uart.c
romstage-y += ../common/wdt.c
+ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c
ramstage-y += emi.c
ramstage-y += ../common/auxadc.c
ramstage-y += ../common/ddp.c ddp.c
diff --git a/src/soc/mediatek/mt8186/Makefile.inc b/src/soc/mediatek/mt8186/Makefile.inc
index 892c809c4a..bd1e560c0d 100644
--- a/src/soc/mediatek/mt8186/Makefile.inc
+++ b/src/soc/mediatek/mt8186/Makefile.inc
@@ -27,6 +27,7 @@ romstage-y += ../common/pmic_wrap.c pmic_wrap.c pmif.c mt6366.c
romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c
ramstage-y += ../common/auxadc.c
+ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c
ramstage-y += ../common/ddp.c ddp.c
ramstage-y += ../common/devapc.c devapc.c
ramstage-y += ../common/dfd.c
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc
index 3e3f59ae15..cd3f473e20 100644
--- a/src/soc/mediatek/mt8192/Makefile.inc
+++ b/src/soc/mediatek/mt8192/Makefile.inc
@@ -32,6 +32,7 @@ romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c
ramstage-y += apusys.c
ramstage-y += ../common/auxadc.c
+ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c
ramstage-y += ../common/ddp.c ddp.c
ramstage-y += devapc.c
ramstage-y += ../common/dfd.c
diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc
index a09cb9c262..2d50506ba4 100644
--- a/src/soc/mediatek/mt8195/Makefile.inc
+++ b/src/soc/mediatek/mt8195/Makefile.inc
@@ -39,6 +39,7 @@ romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c
ramstage-y += apusys.c
ramstage-y += apusys_devapc.c
ramstage-y += ../common/auxadc.c
+ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c
ramstage-y += ../common/early_init.c
ramstage-y += ../common/ddp.c ddp.c
ramstage-y += ../common/devapc.c devapc.c
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-17 19:48:56 +0000