diff options
| -rw-r--r-- | src/drivers/intel/mipi_camera/camera.c | 2 | ||||
| -rw-r--r-- | src/include/cpu/intel/cpu_ids.h | 8 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/bootblock/pmc_descriptor.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/bootblock/report_platform.c | 8 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/romstage/fsp_params.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/romstage/romstage.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/common/block/cpu/mp_init.c | 8 |
7 files changed, 16 insertions, 16 deletions
diff --git a/src/drivers/intel/mipi_camera/camera.c b/src/drivers/intel/mipi_camera/camera.c index d846c813d8..5e3c4bb05a 100644 --- a/src/drivers/intel/mipi_camera/camera.c +++ b/src/drivers/intel/mipi_camera/camera.c @@ -138,7 +138,7 @@ static void camera_fill_cio2(const struct device *dev) port_name[i] = strdup(name); if (CONFIG(ACPI_ADL_IPU_ES_SUPPORT)) { u32 cpu_id = cpu_get_cpuid(); - if (cpu_id == CPUID_ALDERLAKE_A0 || cpu_id == CPUID_ALDERLAKE_A1 || + if (cpu_id == CPUID_ALDERLAKE_J0 || cpu_id == CPUID_ALDERLAKE_Q0 || cpu_id == CPUID_ALDERLAKE_N_A0) acpi_dp_add_integer(dsd, "is_es", 1); else diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h index 07e359afbc..f0c1baf319 100644 --- a/src/include/cpu/intel/cpu_ids.h +++ b/src/include/cpu/intel/cpu_ids.h @@ -51,10 +51,10 @@ #define CPUID_ELKHARTLAKE_A0 0x90660 #define CPUID_ELKHARTLAKE_B0 0x90661 #define CPUID_ALDERLAKE_S_A0 0x90670 -#define CPUID_ALDERLAKE_A0 0x906a0 -#define CPUID_ALDERLAKE_A1 0x906a1 -#define CPUID_ALDERLAKE_A2 0x906a2 -#define CPUID_ALDERLAKE_A3 0x906a4 +#define CPUID_ALDERLAKE_J0 0x906a0 +#define CPUID_ALDERLAKE_Q0 0x906a1 +#define CPUID_ALDERLAKE_K0 0x906a2 +#define CPUID_ALDERLAKE_R0 0x906a4 #define CPUID_ALDERLAKE_N_A0 0xb06e0 #define CPUID_METEORLAKE_A0_1 0xa06a0 #define CPUID_METEORLAKE_A0_2 0xa06a1 diff --git a/src/soc/intel/alderlake/bootblock/pmc_descriptor.c b/src/soc/intel/alderlake/bootblock/pmc_descriptor.c index c585f70c37..14a9dcb90e 100644 --- a/src/soc/intel/alderlake/bootblock/pmc_descriptor.c +++ b/src/soc/intel/alderlake/bootblock/pmc_descriptor.c @@ -45,7 +45,7 @@ void configure_pmc_descriptor(void) uint8_t si_desc_buf[CONFIG_SI_DESC_REGION_SZ]; struct region_device desc_rdev; - if (cpu_get_cpuid() != CPUID_ALDERLAKE_A0) + if (cpu_get_cpuid() != CPUID_ALDERLAKE_J0) return; if (fmap_locate_area_as_rdev_rw(CONFIG_SI_DESC_REGION, &desc_rdev) < 0) { diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index 3342e4b732..721355c06a 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -23,10 +23,10 @@ static struct { u32 cpuid; const char *name; } cpu_table[] = { - { CPUID_ALDERLAKE_A0, "Alderlake Platform" }, - { CPUID_ALDERLAKE_A1, "Alderlake Platform" }, - { CPUID_ALDERLAKE_A2, "Alderlake Platform" }, - { CPUID_ALDERLAKE_A3, "Alderlake Platform" }, + { CPUID_ALDERLAKE_J0, "Alderlake J0 Platform" }, + { CPUID_ALDERLAKE_K0, "Alderlake K0 Platform" }, + { CPUID_ALDERLAKE_Q0, "Alderlake Q0 Platform" }, + { CPUID_ALDERLAKE_R0, "Alderlake R0 Platform" }, { CPUID_ALDERLAKE_N_A0, "Alderlake-N Platform" }, }; diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index 2e76cd78c7..fe21b41893 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -273,7 +273,7 @@ static void fill_fspm_vtd_params(FSP_M_CONFIG *m_cfg, const uint32_t cpuid = cpu_get_cpuid(); /* Disable VT-d for early silicon steppings as it results in a CPU hard hang */ - if (cpuid == CPUID_ALDERLAKE_A0 || cpuid == CPUID_ALDERLAKE_A1) { + if (cpuid == CPUID_ALDERLAKE_J0 || cpuid == CPUID_ALDERLAKE_Q0) { m_cfg->VtdDisable = 1; return; } diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c index 45421c810b..5e79535ecf 100644 --- a/src/soc/intel/alderlake/romstage/romstage.c +++ b/src/soc/intel/alderlake/romstage/romstage.c @@ -27,7 +27,7 @@ bool skip_cse_sub_part_update(void) { - return cpu_get_cpuid() != CPUID_ALDERLAKE_A2; + return cpu_get_cpuid() != CPUID_ALDERLAKE_K0; } /* Save the DIMM information for SMBIOS table 17 */ diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 2d838c5ea3..0305815750 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -70,10 +70,10 @@ static const struct cpu_device_id cpu_table[] = { { X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_B0 }, { X86_VENDOR_INTEL, CPUID_JASPERLAKE_A0 }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_S_A0 }, - { X86_VENDOR_INTEL, CPUID_ALDERLAKE_A0 }, - { X86_VENDOR_INTEL, CPUID_ALDERLAKE_A1 }, - { X86_VENDOR_INTEL, CPUID_ALDERLAKE_A2 }, - { X86_VENDOR_INTEL, CPUID_ALDERLAKE_A3 }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_J0 }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_K0 }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_Q0 }, + { X86_VENDOR_INTEL, CPUID_ALDERLAKE_R0 }, { X86_VENDOR_INTEL, CPUID_ALDERLAKE_N_A0 }, { 0, 0 }, }; |