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-rw-r--r--src/soc/intel/common/block/include/intelblocks/pmclib.h2
-rw-r--r--src/soc/intel/common/block/pmc/pmclib.c11
2 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h
index 62f27a9d5a..36049ba48a 100644
--- a/src/soc/intel/common/block/include/intelblocks/pmclib.h
+++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h
@@ -135,6 +135,8 @@ void pmc_disable_all_gpe(void);
/* Clear STD and GPIO GPE status registers. */
void pmc_clear_all_gpe_status(void);
+/* Write PMC MMIO register value with the provided bitmask. */
+void pmc_or_mmio32(uint32_t offset, uint32_t ormask);
/* Clear status bits in Power and Reset Status (PRSTS) register */
void pmc_clear_prsts(void);
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index 68bde41568..4786fc1b5a 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -367,6 +367,17 @@ void soc_clear_pm_registers(uintptr_t pmc_bar)
{
}
+void pmc_or_mmio32(uint32_t offset, uint32_t ormask)
+{
+ uint32_t reg;
+ uintptr_t pmc_bar;
+
+ pmc_bar = soc_read_pmc_base();
+ reg = read32p(pmc_bar + offset);
+ reg |= ormask;
+ write32p(pmc_bar + offset, reg);
+}
+
void pmc_clear_prsts(void)
{
uint32_t prsts;