diff options
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb index 3281902464..762aa84bbe 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb @@ -19,6 +19,8 @@ chip soc/intel/alderlake # DPTF enable register "dptf_enable" = "1" + register "tcc_offset" = "10" # TCC of 90 + # Enable heci communication register "HeciEnabled" = "1" |