diff options
| -rw-r--r-- | src/mainboard/intel/adlrvp/devicetree.cb | 4 | ||||
| -rw-r--r-- | src/mainboard/intel/adlrvp/gpio.c | 5 |
2 files changed, 8 insertions, 1 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb index ce55fa3914..80edb92003 100644 --- a/src/mainboard/intel/adlrvp/devicetree.cb +++ b/src/mainboard/intel/adlrvp/devicetree.cb @@ -90,7 +90,9 @@ chip soc/intel/alderlake # Enable EDP in PortA register "DdiPortAConfig" = "1" - register "DdiPortBConfig" = "1" + # Enable HDMI in Port B + register "DdiPortBDdc" = "1" + register "DdiPortBHpd" = "1" # TCSS USB3 register "TcssAuxOri" = "0" diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c index a44d4ac43d..89e6f5826b 100644 --- a/src/mainboard/intel/adlrvp/gpio.c +++ b/src/mainboard/intel/adlrvp/gpio.c @@ -287,6 +287,11 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_H21, NONE, DEEP, NF1), PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1), PAD_CFG_NF(GPP_H23, NONE, DEEP, NF1), + + /* A21 : HDMI CRLS CTRLCLK */ + PAD_CFG_NF(GPP_A21, NONE, DEEP, NF1), + /* A22 : HDMI CRLS CTRLDATA */ + PAD_CFG_NF(GPP_A22, NONE, DEEP, NF1), }; void variant_configure_gpio_pads(void) |