diff options
| -rw-r--r-- | src/soc/amd/phoenix/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/amd/phoenix/acpi.c | 73 |
2 files changed, 29 insertions, 45 deletions
diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig index b108c8f2da..4ef402ecf3 100644 --- a/src/soc/amd/phoenix/Kconfig +++ b/src/soc/amd/phoenix/Kconfig @@ -37,6 +37,7 @@ config SOC_AMD_PHOENIX select SOC_AMD_COMMON_BLOCK_ACPIMMIO # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_ACPI_ALIB # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_ACPI_CPPC # TODO: Check if this is still correct + select SOC_AMD_COMMON_BLOCK_ACPI_CPU_POWER_STATE select SOC_AMD_COMMON_BLOCK_ACPI_GPIO # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_ACPI_IVRS # TODO: Check if this is still correct select SOC_AMD_COMMON_BLOCK_AOAC diff --git a/src/soc/amd/phoenix/acpi.c b/src/soc/amd/phoenix/acpi.c index d5f5207112..2646f2f1a1 100644 --- a/src/soc/amd/phoenix/acpi.c +++ b/src/soc/amd/phoenix/acpi.c @@ -226,15 +226,38 @@ static size_t get_pstate_info(struct acpi_sw_pstate *pstate_values, return pstate_count; } +const acpi_cstate_t cstate_cfg_table[] = { + [0] = { + .ctype = 1, + .latency = 1, + .power = 0, + }, + [1] = { + .ctype = 2, + .latency = 0x12, + .power = 0, + }, + [2] = { + .ctype = 3, + .latency = 350, + .power = 0, + }, +}; + +const acpi_cstate_t *get_cstate_config_data(size_t *size) +{ + *size = ARRAY_SIZE(cstate_cfg_table); + return cstate_cfg_table; +} + void generate_cpu_entries(const struct device *device) { int logical_cores; - size_t pstate_count, cpu; + size_t cstate_count, pstate_count, cpu; + acpi_cstate_t cstate_values[MAX_CSTATE_COUNT] = { {0} }; struct acpi_sw_pstate pstate_values[MAX_PSTATES] = { {0} }; struct acpi_xpss_sw_pstate pstate_xpss_values[MAX_PSTATES] = { {0} }; uint32_t threads_per_core; - uint32_t cstate_base_address = - rdmsr(MSR_CSTATE_ADDRESS).lo & MSR_CSTATE_ADDRESS_MASK; const acpi_addr_t perf_ctrl = { .space_id = ACPI_ADDRESS_SPACE_FIXED, @@ -247,48 +270,8 @@ void generate_cpu_entries(const struct device *device) .addrl = PS_STS_REG, }; - const acpi_cstate_t cstate_info[] = { - [0] = { - .ctype = 1, - .latency = 1, - .power = 0, - .resource = { - .space_id = ACPI_ADDRESS_SPACE_FIXED, - .bit_width = 2, - .bit_offset = 2, - .addrl = 0, - .addrh = 0, - }, - }, - [1] = { - .ctype = 2, - .latency = 0x12, - .power = 0, - .resource = { - .space_id = ACPI_ADDRESS_SPACE_IO, - .bit_width = 8, - .bit_offset = 0, - .addrl = cstate_base_address + 1, - .addrh = 0, - .access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS, - }, - }, - [2] = { - .ctype = 3, - .latency = 350, - .power = 0, - .resource = { - .space_id = ACPI_ADDRESS_SPACE_IO, - .bit_width = 8, - .bit_offset = 0, - .addrl = cstate_base_address + 2, - .addrh = 0, - .access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS, - }, - }, - }; - threads_per_core = get_threads_per_core(); + cstate_count = get_cstate_info(cstate_values); pstate_count = get_pstate_info(pstate_values, pstate_xpss_values); logical_cores = get_cpu_count(); @@ -309,7 +292,7 @@ void generate_cpu_entries(const struct device *device) acpigen_write_PPC(0); - acpigen_write_CST_package(cstate_info, ARRAY_SIZE(cstate_info)); + acpigen_write_CST_package(cstate_values, cstate_count); acpigen_write_CSD_package(cpu / threads_per_core, threads_per_core, CSD_HW_ALL, 0); |