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-rw-r--r--src/include/device/pci_ids.h2
-rw-r--r--src/soc/intel/alderlake/bootblock/report_platform.c4
-rw-r--r--src/soc/intel/common/block/graphics/graphics.c2
3 files changed, 7 insertions, 1 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 7831d5b575..d3ba149afb 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -4147,6 +4147,8 @@
#define PCI_DID_INTEL_RPL_U_GT4 0xa7ac
#define PCI_DID_INTEL_RPL_U_GT5 0xa7ad
#define PCI_DID_INTEL_LNL_M_GT2 0x64a0
+#define PCI_DID_INTEL_TWL_GT1_1 0x46D3
+#define PCI_DID_INTEL_TWL_GT1_2 0x46D4
/* Intel Northbridge Ids */
#define PCI_DID_INTEL_APL_NB 0x5af0
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index bd4960d0fe..cd4ac00c14 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -236,7 +236,9 @@ static struct {
{ PCI_DID_INTEL_RPL_S_GT0, "Raptorlake S GT0" },
{ PCI_DID_INTEL_RPL_S_GT1_1, "Raptorlake S GT1" },
{ PCI_DID_INTEL_RPL_S_GT1_2, "Raptorlake S GT1" },
- { PCI_DID_INTEL_RPL_S_GT1_3, "Raptorlake S GT1" }
+ { PCI_DID_INTEL_RPL_S_GT1_3, "Raptorlake S GT1" },
+ { PCI_DID_INTEL_TWL_GT1_1, "Twinlake GT1" },
+ { PCI_DID_INTEL_TWL_GT1_2, "Twinlake GT1" },
};
static inline uint8_t get_dev_revision(pci_devfn_t dev)
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index ef4b269144..eabcb9a5a8 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -456,6 +456,8 @@ static const unsigned short pci_device_ids[] = {
PCI_DID_INTEL_RPL_HX_GT2,
PCI_DID_INTEL_RPL_HX_GT3,
PCI_DID_INTEL_RPL_HX_GT4,
+ PCI_DID_INTEL_TWL_GT1_1,
+ PCI_DID_INTEL_TWL_GT1_2,
0,
};