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-rw-r--r--src/soc/intel/xeon_sp/spr/Kconfig6
-rw-r--r--src/soc/intel/xeon_sp/spr/romstage.c7
2 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
index 308ec2d45e..f666ab5dae 100644
--- a/src/soc/intel/xeon_sp/spr/Kconfig
+++ b/src/soc/intel/xeon_sp/spr/Kconfig
@@ -182,4 +182,10 @@ config ENABLE_IO_MARGINING
ASPM. This option is intended for debugging and validation and
should normally be disabled.
+config ENABLE_RMT
+ bool "Enable RMT"
+ default n
+ help
+ Enable Rank Margining Tool. This option is intended for debugging and
+ validation and should normally be disabled.
endif
diff --git a/src/soc/intel/xeon_sp/spr/romstage.c b/src/soc/intel/xeon_sp/spr/romstage.c
index 8f4e98eea4..fef4d94d0f 100644
--- a/src/soc/intel/xeon_sp/spr/romstage.c
+++ b/src/soc/intel/xeon_sp/spr/romstage.c
@@ -217,6 +217,13 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
mupd->FspmConfig.KtiLinkL1En = 0;
mupd->FspmConfig.KtiLinkL0pEn = 0;
}
+
+ if (CONFIG(ENABLE_RMT)) {
+ printk(BIOS_INFO, "RMT Enabled.\n");
+ mupd->FspmConfig.EnableRMT = 0x1;
+ /* Set FSP debug message to Max for RMT logs */
+ mupd->FspmConfig.serialDebugMsgLvl = 0x3;
+ }
}
static uint8_t get_error_correction_type(const uint8_t RasModesEnabled)