diff options
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 14 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 14 |
2 files changed, 14 insertions, 14 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 675e071ba9..7f1e210123 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -287,20 +287,6 @@ #define WIDEIO_RANGE_ERROR -1 #define TOTAL_WIDEIO_PORTS 3 -static inline int sb_sata_enable(void) -{ - /* True if IDE or AHCI. */ - return (CONFIG_STONEYRIDGE_SATA_MODE == 0) || - (CONFIG_STONEYRIDGE_SATA_MODE == 2); -} - -static inline int sb_ide_enable(void) -{ - /* True if IDE or LEGACY IDE. */ - return (CONFIG_STONEYRIDGE_SATA_MODE == 0) || - (CONFIG_STONEYRIDGE_SATA_MODE == 3); -} - void sb_enable_rom(void); void configure_stoneyridge_uart(void); void sb_clk_output_48Mhz(void); diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index cf896cb857..0af774bbf6 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -38,6 +38,20 @@ static int is_sata_config(void) || (CONFIG_STONEYRIDGE_SATA_MODE == SataLegacyIde)); } +static inline int sb_sata_enable(void) +{ + /* True if IDE or AHCI. */ + return (CONFIG_STONEYRIDGE_SATA_MODE == SataNativeIde) || + (CONFIG_STONEYRIDGE_SATA_MODE == SataAhci); +} + +static inline int sb_ide_enable(void) +{ + /* True if IDE or LEGACY IDE. */ + return (CONFIG_STONEYRIDGE_SATA_MODE == SataNativeIde) || + (CONFIG_STONEYRIDGE_SATA_MODE == SataLegacyIde); +} + void SetFchResetParams(FCH_RESET_INTERFACE *params) { params->Xhci0Enable = IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE); |