diff options
| -rw-r--r-- | src/soc/intel/cannonlake/fsp_params.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index b8dba184cb..2b83275df1 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -245,9 +245,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* Enable xDCI controller if enabled in devicetree and allowed */ dev = dev_find_slot(0, PCH_DEVFN_USBOTG); - if (!xdci_can_enable()) - dev->enabled = 0; - params->XdciEnable = dev->enabled; + if (dev) { + if (!xdci_can_enable()) + dev->enabled = 0; + params->XdciEnable = dev->enabled; + } else + params->XdciEnable = 0; /* Set Debug serial port */ params->SerialIoDebugUartNumber = CONFIG_UART_FOR_CONSOLE; @@ -255,9 +258,15 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* Enable CNVi Wifi if enabled in device tree */ dev = dev_find_slot(0, PCH_DEVFN_CNViWIFI); #if CONFIG(SOC_INTEL_COMETLAKE) - params->CnviMode = dev->enabled; + if (dev) + params->CnviMode = dev->enabled; + else + params->CnviMode = 0; #else - params->PchCnviMode = dev->enabled; + if (dev) + params->PchCnviMode = dev->enabled; + else + params->PchCnviMode = 0; #endif /* PCI Express */ for (i = 0; i < ARRAY_SIZE(config->PcieClkSrcUsage); i++) { |