diff options
| -rw-r--r-- | src/southbridge/intel/lynxpoint/early_pch.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/pch.h | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c index 9909bb6d44..fdbb2a3d47 100644 --- a/src/southbridge/intel/lynxpoint/early_pch.c +++ b/src/southbridge/intel/lynxpoint/early_pch.c @@ -102,7 +102,7 @@ static int sleep_type_s3(void) return is_s3; } -static void pch_enable_lpc(void) +void pch_enable_lpc(void) { const struct device *dev = dev_find_slot(0, PCI_DEVFN(0x1f, 0)); const struct southbridge_intel_lynxpoint_config *config = NULL; diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index 339636742b..9b5cb6f160 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -213,6 +213,7 @@ int smbus_read_byte(unsigned device, unsigned address); int early_spi_read(u32 offset, u32 size, u8 *buffer); int early_pch_init(const void *gpio_map, const struct rcba_config_instruction *rcba_config); +void pch_enable_lpc(void); #endif /* !__PRE_RAM__ && !__SMM__ */ #endif /* __ASSEMBLER__ */ |