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-rw-r--r--src/mainboard/google/hatch/variants/jinlon/mainboard.c2
-rw-r--r--src/mainboard/google/hatch/variants/jinlon/overridetree.cb8
2 files changed, 9 insertions, 1 deletions
diff --git a/src/mainboard/google/hatch/variants/jinlon/mainboard.c b/src/mainboard/google/hatch/variants/jinlon/mainboard.c
index 51ef3465eb..009a6ad239 100644
--- a/src/mainboard/google/hatch/variants/jinlon/mainboard.c
+++ b/src/mainboard/google/hatch/variants/jinlon/mainboard.c
@@ -21,9 +21,11 @@ static bool eps_sku(uint32_t sku_id)
static void check_for_eps(uint32_t sku_id)
{
struct device *eps_dev = DEV_PTR(eps);
+ struct device *no_eps_dev = DEV_PTR(no_eps);
if (eps_sku(sku_id)) {
printk(BIOS_INFO, "SKU ID %u has EPS\n", sku_id);
+ no_eps_dev->enabled = 0;
return;
}
diff --git a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
index 82694a08bb..a4c29ca3a1 100644
--- a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
@@ -70,7 +70,6 @@ chip soc/intel/cannonlake
device domain 0 on
device ref igpu on
- register "gfx" = "GMA_DEFAULT_PANEL(0)"
chip drivers/gfx/generic
register "device_count" = "1"
register "device[0].name" = ""LCD0""
@@ -82,6 +81,13 @@ chip soc/intel/cannonlake
register "device[0].privacy.gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E0)"
device generic 0 alias eps on end
end
+ chip drivers/gfx/generic
+ register "device_count" = "1"
+ register "device[0].name" = ""LCD0""
+ # Internal panel on the first port of the graphics chip
+ register "device[0].addr" = "0x80010400"
+ device generic 1 alias no_eps on end
+ end
end
device ref xhci on
chip drivers/usb/acpi