diff options
| -rw-r--r-- | src/soc/intel/meteorlake/Kconfig | 5 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/acpi/southbridge.asl | 3 |
2 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index 72179f8ca1..c565be8166 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -63,6 +63,7 @@ config CPU_SPECIFIC_OPTIONS select MP_SERVICES_PPI_V2 select MRC_SETTINGS_PROTECT select PARALLEL_MP_AP_WORK + select PCIE_CLOCK_CONTROL_THROUGH_P2SB select PLATFORM_USES_FSP2_3 select PMC_GLOBAL_RESET_ENABLE_LOCK select SOC_INTEL_COMMON @@ -424,4 +425,8 @@ config PCIE_LTR_MAX_NO_SNOOP_LATENCY help Latency tolerance reporting, max non-snoop latency value defaults to 15.73 ms. +config IOE_DIE_CLOCK_START + int + default 6 if SOC_INTEL_METEORLAKE_U_H + endif diff --git a/src/soc/intel/meteorlake/acpi/southbridge.asl b/src/soc/intel/meteorlake/acpi/southbridge.asl index 0b588f9721..e89b65653a 100644 --- a/src/soc/intel/meteorlake/acpi/southbridge.asl +++ b/src/soc/intel/meteorlake/acpi/southbridge.asl @@ -12,6 +12,9 @@ #include <soc/intel/common/acpi/ioe_pcr.asl> #endif +/* PCIE src clock control */ +#include <soc/intel/common/acpi/pcie_clk.asl> + /* PCH clock */ #include "camera_clock_ctl.asl" |