diff options
| -rw-r--r-- | src/include/bootblock_common.h | 6 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/bootblock/bootblock.c | 8 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/bootblock/cache_as_ram.S | 4 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/bootblock.h | 20 |
4 files changed, 12 insertions, 26 deletions
diff --git a/src/include/bootblock_common.h b/src/include/bootblock_common.h index 0985241590..04fc0cbfd5 100644 --- a/src/include/bootblock_common.h +++ b/src/include/bootblock_common.h @@ -29,6 +29,12 @@ void bootblock_mainboard_early_init(void); void bootblock_mainboard_init(void); void bootblock_soc_early_init(void); void bootblock_soc_init(void); + +/* + * C code entry point for the boot block. + */ +void asmlinkage bootblock_c_entry(uint64_t base_timestamp); + /* * This is a the same as the bootblock main(), with the difference that it does * not collect a timestamp. Instead it accepts the first timestamp as an diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c index 68ce7ab640..ca402e922b 100644 --- a/src/soc/intel/apollolake/bootblock/bootblock.c +++ b/src/soc/intel/apollolake/bootblock/bootblock.c @@ -19,7 +19,6 @@ #include <cpu/x86/mtrr.h> #include <device/pci.h> #include <lib.h> -#include <soc/bootblock.h> #include <soc/iomap.h> #include <soc/cpu.h> #include <soc/gpio.h> @@ -54,7 +53,7 @@ static void enable_pm_timer(void) wrmsr(MSR_EMULATE_PM_TMR, msr); } -void asmlinkage bootblock_c_entry(uint32_t tsc_hi, uint32_t tsc_lo) +void asmlinkage bootblock_c_entry(uint64_t base_timestamp) { device_t dev = NB_DEV_ROOT; @@ -71,7 +70,8 @@ void asmlinkage bootblock_c_entry(uint32_t tsc_hi, uint32_t tsc_lo) /* BAR and MMIO enable for IOSF, so that GPIOs can be configured */ pci_write_config32(dev, PCI_BASE_ADDRESS_0, CONFIG_IOSF_BASE_ADDRESS); pci_write_config32(dev, PCI_BASE_ADDRESS_1, 0); - pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); + pci_write_config16(dev, PCI_COMMAND, + PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); /* Decode the ACPI I/O port range for early firmware verification.*/ dev = PMC_DEV; @@ -80,7 +80,7 @@ void asmlinkage bootblock_c_entry(uint32_t tsc_hi, uint32_t tsc_lo) PCI_COMMAND_IO | PCI_COMMAND_MASTER); /* Call lib/bootblock.c main */ - bootblock_main_with_timestamp(((uint64_t)tsc_hi << 32) | tsc_lo); + bootblock_main_with_timestamp(base_timestamp); } static void cache_bios_region(void) diff --git a/src/soc/intel/apollolake/bootblock/cache_as_ram.S b/src/soc/intel/apollolake/bootblock/cache_as_ram.S index f19cb71f55..8647206c0a 100644 --- a/src/soc/intel/apollolake/bootblock/cache_as_ram.S +++ b/src/soc/intel/apollolake/bootblock/cache_as_ram.S @@ -130,10 +130,10 @@ before_carstage: post_code(0x2b) /* Restore the timestamp from bootblock_crt0.S (mm2:mm1) */ - movd %mm1, %eax - push %eax movd %mm2, %eax push %eax + movd %mm1, %eax + push %eax /* We can call into C functions now */ call bootblock_c_entry diff --git a/src/soc/intel/apollolake/include/soc/bootblock.h b/src/soc/intel/apollolake/include/soc/bootblock.h deleted file mode 100644 index 9ce9231098..0000000000 --- a/src/soc/intel/apollolake/include/soc/bootblock.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _SOC_APOLLOLAKE_BOOTBLOCK_H_ -#define _SOC_APOLLOLAKE_BOOTBLOCK_H_ -#include <arch/cpu.h> - -void asmlinkage bootblock_c_entry(uint32_t tsc_hi, uint32_t tsc_lo); -#endif |