diff options
| -rw-r--r-- | src/soc/intel/skylake/chip.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/skylake/chip_fsp20.c | 3 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index beb5a7aa0b..45f3f9982a 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -173,6 +173,7 @@ struct soc_intel_skylake_config { u8 PcieRpEnable[CONFIG_MAX_ROOT_PORTS]; u8 PcieRpClkReqSupport[CONFIG_MAX_ROOT_PORTS]; u8 PcieRpClkReqNumber[CONFIG_MAX_ROOT_PORTS]; + u8 PcieRpAdvancedErrorReporting[CONFIG_MAX_ROOT_PORTS]; /* USB related */ struct usb2_port_config usb2_ports[16]; diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index aa612ede0a..adf87723dc 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -166,6 +166,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) sizeof(params->PcieRpClkReqSupport)); memcpy(params->PcieRpClkReqNumber, config->PcieRpClkReqNumber, sizeof(params->PcieRpClkReqNumber)); + memcpy(params->PcieRpAdvancedErrorReporting, + config->PcieRpAdvancedErrorReporting, + sizeof(params->PcieRpAdvancedErrorReporting)); /* disable Legacy PME */ memset(params->PcieRpPmSci, 0, sizeof(params->PcieRpPmSci)); |