diff options
| -rw-r--r-- | src/soc/amd/picasso/Kconfig | 107 | ||||
| -rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 321 |
2 files changed, 326 insertions, 102 deletions
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index f5f926e734..4580915a79 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -1,7 +1,7 @@ ## ## This file is part of the coreboot project. ## -## Copyright (C) 2017 Advanced Micro Devices, Inc. +## Copyright (C) 2019 Advanced Micro Devices, Inc. ## ## This program is free software; you can redistribute it and/or modify ## it under the terms of the GNU General Public License as published by @@ -134,7 +134,7 @@ config EHCI_BAR config AMD_PUBKEY_FILE string "AMD public Key" - default "3rdparty/blobs/soc/amd/picasso/PSP/AmdPubKeyST.bin" + default "3rdparty/blobs/soc/amd/picasso/PSP/AmdPubKeyRV.bin" config PICASSO_SATA_MODE int "SATA Mode" @@ -242,14 +242,24 @@ config ACPI_BERT ACPI Boot Error Record Table. This option reserves an 8MB region for building the error structures. -config USE_PSPSECUREOS - bool "Include PSP SecureOS blobs in AMD firmware" - default y +config RO_REGION_ONLY + string + depends on CHROMEOS + default "apu/amdfw" + +config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ + int + default 133 + +config MAINBOARD_POWER_RESTORE + def_bool n help - Include the PspSecureOs, PspTrustlet and TrustletKey binaries - in the amdfw section. + This option determines what state to go to once power is restored + after having been lost in S0. Select this option to automatically + return to S0. Otherwise the system will remain in S5 once power + is restored. - If unsure, answer 'y' +menu "PSP Configuration Options" config AMDFW_OUTSIDE_CBFS bool "The AMD firmware is outside CBFS" @@ -292,21 +302,76 @@ comment "AMD Firmware Directory Table set to location for 8MB ROM" comment "AMD Firmware Directory Table set to location for 16MB ROM" depends on AMD_FWM_POSITION_INDEX = 5 -config RO_REGION_ONLY - string - depends on CHROMEOS - default "apu/amdfw" +config AMD_PUBKEY_FILE + string "AMD public Key" + default "3rdparty/blobs/soc/amd/picasso/PSP/AmdPubKeyRV.bin" -config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ - int - default 133 +config PSP_APCB_FILE + string "APCB file" + help + The name of the AGESA Parameter Customization Block. -config MAINBOARD_POWER_RESTORE - def_bool n +config PSP_APOB_DESTINATION + hex + default 0x9f00000 help - This option determines what state to go to once power is restored - after having been lost in S0. Select this option to automatically - return to S0. Otherwise the system will remain in S5 once power - is restored. + Location in DRAM where the PSP will copy the AGESA PSP Output + Block. + +config PSP_APOB_NV_ADDRESS + hex "Base address of APOB NV" + default 0xffa68000 + help + Location in flash where the PSP can find the S3 restore information. + Place this on a boundary that the flash device can erase. + TODO: The above default value is arbitrary, but eventually coreboot's + MRC cache base address should be used. + +config PSP_APOB_NV_SIZE + hex "Size of APOB NV to be reserved" + default 0x10000 + help + Size of the S3 restore information. Make this a multiple of the + size the flash device can erase. + TODO: The above default value is arbitrary, but eventually coreboot's + MRC cache size should be used. + +config USE_PSPSCUREOS + bool "Include PSP SecureOS blobs in PSP build" + default y + help + Include the PspSecureOs and PspTrustlet binaries in the PSP build. + + If unsure, answer 'y' + +config PSP_LOAD_MP2_FW + bool "Include MP2 blobs in PSP build" + default y + help + Include the MP2 firmwares and configuration into the PSP build. + + If unsure, answer 'y' + +config PSP_LOAD_S0I3_FW + bool "Include S0I3 blob in PSP build" + help + Select this item to include the S0i3 file into the PSP build. + +config HAVE_PSP_WHITELIST_FILE + bool "Include a debug whitelist file in PSP build" + default n + help + Support secured unlock prior to reset using a whitelisted + number? This feature requires a signed whitelist image and + bootloader from AMD. + + If unsure, answer 'n' + +config PSP_WHITELIST_FILE + string "Debug whitelist file name" + depends on HAVE_PSP_WHITELIST_FILE + default "3rdparty/blobs/soc/amd/picasso/PSP/wtl-rvn.sbin" + +endmenu endif # SOC_AMD_PICASSO diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 38c00a8dd0..56f792c365 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -1,6 +1,6 @@ #***************************************************************************** # -# Copyright (c) 2012, 2016-2017 Advanced Micro Devices, Inc. +# Copyright (c) 2012, 2016-2019 Advanced Micro Devices, Inc. # 2013 - 2014 Sage Electronic Engineering, LLC # All rights reserved. # @@ -96,126 +96,291 @@ CPPFLAGS_common += -I$(src)/soc/amd/picasso/acpi # ROMSIG Normally At ROMBASE + 0x20000 # Overridden by CONFIG_AMD_FWM_POSITION_INDEX # +-----------+---------------+----------------+------------+ -# |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM | +# |0x55AA55AA | | | | # +-----------+---------------+----------------+------------+ -# |PSPDIR ADDR| -# +-----------+ -# -# EC ROM should be 64K aligned. +# | | PSPDIR ADDR | BIOSDIR ADDR | +# +-----------+---------------+----------------+ + PICASSO_FWM_POSITION=$(call int-add, \ $(call int-subtract, 0xffffffff \ $(call int-shift-left, \ 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1) -### 0 +# +# PSP Directory Table items +# +# Certain ordering requirements apply, however these are ensured by amdfwtool. +# For more information see "AMD Platform Security Processor BIOS Architecture +# Design Guide for AMD Family 17h Processors" (PID #55758, NDA only). +# + +# type = 0x0 FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE))) -FIRMWARE_TYPE=ST -###5 -PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key +# type = 0x1 +ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y) +PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_WL_RV.sbin +else +PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_RV.sbin +endif + +# type = 0x5 +PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSignedRV.key -###1 -PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_$(FIRMWARE_TYPE).sbin +# types = 0x8 and 0x18 +PSP_SMUFW1_SUB1_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmwareRV2.csbin +PSP_SMUFW1_SUB2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmwarePCO.csbin +PSP_SMUFW2_SUB1_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2RV2.csbin +PSP_SMUFW2_SUB2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2PCO.csbin -###3 -PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin +# type = 0x9 +PSP_SEC_DBG_KEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RavenSecureDebug_PublicKey.bin -###4 -PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin +# type = 0xb - See #55758 (NDA) for bit definitions. +PSP_SOFTFUSE="0x0000000010000001" -###8 - Check for SMU firmware named either *.sbin or *.csbin -### TODO: Remove *.sbin section after the blobs repo is updated. -SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE).csbin -ifeq ("$(wildcard $(SMUFWM_FILE))","") -SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin +ifeq ($(CONFIG_USE_PSPSCUREOS),y) +# types = 0x2, 0xc +PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/psp_os_combined_prod_RV.sbin +PSPTRUSTLETS_FILE=$(top)/$(FIRMWARE_LOCATE)/dr_ftpm_prod_RV.csbin endif -###95 -SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin +# type = 0x13 +PSP_SEC_DEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/secure_unlock_prod_RV.sbin + +# type = 0x21 +PSP_IKEK_FILE=$(top)/$(FIRMWARE_LOCATE)/PspIkekRV.bin -###9 -PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key +# type = 0x24 +PSP_SECG1_FILE=$(top)/$(FIRMWARE_LOCATE)/security_policy_RV2_FP5_AM4.sbin +PSP_SECG2_FILE=$(top)/$(FIRMWARE_LOCATE)/security_policy_PCO_FP5_AM4.sbin -ifeq ($(CONFIG_USE_PSPSECUREOS),y) -###2 -PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin +ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y) +# type = 0x25 +PSP_MP2FW1_FILE=$(top)/$(FIRMWARE_LOCATE)/MP2I2CFWRV2.sbin +PSP_MP2FW2_FILE=$(top)/$(FIRMWARE_LOCATE)/MP2I2CFWPCO.sbin +# BIOS type = 0x6a +PSP_MP2CFG_FILE=$(top)/$(FIRMWARE_LOCATE)/MP2FWConfig.sbin +else +PSP_SOFTFUSE="0x0000000030000001" +endif -###12 -PSPTRUSTLETS_FILE=$(wildcard $(top)/$(FIRMWARE_LOCATE)/PspTrustlets*_prod_$(FIRMWARE_TYPE).cbin) +# type = 0x28 +PSP_DRIVERS_FILE=$(top)/$(FIRMWARE_LOCATE)/drv_sys_prod_RV.sbin -###13 -TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin +ifeq ($(CONFIG_PSP_LOAD_S0I3_FW),y) +PSP_S0I3_FILE=$(top)/$(FIRMWARE_LOCATE)/dr_agesa_prod_RV.sbin endif -###18- Check for SMU firmware2 named either *.sbin or *.csbin -### TODO: Remove *.sbin section after the blobs repo is updated. -SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).csbin -ifeq ("$(wildcard $(SMUFIRMWARE2_FILE))","") -SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin +# types = 0x30 - 0x37 +PSP_ABL0_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader0_prod_RV.csbin +PSP_ABL1_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader1_prod_RV.csbin +PSP_ABL2_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader2_prod_RV.csbin +PSP_ABL3_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader3_prod_RV.csbin +PSP_ABL4_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader4_prod_RV.csbin +PSP_ABL5_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader5_prod_RV.csbin +PSP_ABL6_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader6_prod_RV.csbin +PSP_ABL7_FILE=$(top)/$(FIRMWARE_LOCATE)/AgesaBootloader7_prod_RV.csbin + +# type = 0x3a +ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y) +PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE) endif +# +# BIOS Directory Table items - proper ordering is managed by amdfwtool +# + +# type = 0x60 +PSP_APCB_FILE=$(call strip_quotes, $(CONFIG_PSP_APCB_FILE)) + +# type = 0x61 +PSP_APOB_BASE=$(CONFIG_PSP_APOB_DESTINATION) + +# type = 0x62 +PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img +PSP_BIOSBIN_DEST=$(CONFIG_ROMSTAGE_ADDR) +PSP_BIOSBIN_SIZE=$(CONFIG_RAM_RESET_VECTOR_STAGE_SIZE) + +# type = 0x63 +PSP_APOBNV_BASE=$(CONFIG_PSP_APOB_NV_ADDRESS) +PSP_APOBNV_SIZE=$(CONFIG_PSP_APOB_NV_SIZE) + +# type2 = 0x64, 0x65 +PSP_PMUI_FILE1=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_1D_Ddr4_Udimm_Imem.csbin +PSP_PMUI_FILE2=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_2D_Ddr4_Imem.csbin +PSP_PMUI_FILE3=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv2_1D_ddr4_Udimm_Imem.csbin +PSP_PMUI_FILE4=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv2_2D_ddr4_Udimm_Imem.csbin +PSP_PMUD_FILE1=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_1D_Ddr4_Udimm_Dmem.csbin +PSP_PMUD_FILE2=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv_2D_Ddr4_Dmem.csbin +PSP_PMUD_FILE3=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv2_1D_ddr4_Udimm_Dmem.csbin +PSP_PMUD_FILE4=$(top)/$(FIRMWARE_LOCATE)/Appb_Rv2_2D_ddr4_Udimm_Dmem.csbin + +# type = 0x66 +PSP_UCODE_FILE1=$(top)/$(FIRMWARE_LOCATE)/UcodePatch_PCO_B1.bin +PSP_UCODE_FILE2=$(top)/$(FIRMWARE_LOCATE)/UcodePatch_PCO_B0.bin +PSP_UCODE_FILE3=$(top)/$(FIRMWARE_LOCATE)/UcodePatch_RV2_A0.bin + +# +# Build the arguments to amdfwtool (order is unimportant). Missing file names +# result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool. +# + add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) OPT_AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_AMD_PUBKEY_FILE), --pubkey) OPT_PSPBTLDR_FILE=$(call add_opt_prefix, $(PSPBTLDR_FILE), --bootloader) -OPT_SMUFWM_FILE=$(call add_opt_prefix, $(SMUFWM_FILE), --smufirmware) -OPT_PSPRCVR_FILE=$(call add_opt_prefix, $(PSPRCVR_FILE), --recovery) -OPT_PUBSIGNEDKEY_FILE=$(call add_opt_prefix, $(PUBSIGNEDKEY_FILE), --rtmpubkey) OPT_PSPNVRAM_FILE=$(call add_opt_prefix, $(PSPNVRAM_FILE), --nvram) -OPT_PSPSECUREDEBUG_FILE=$(call add_opt_prefix, $(PSPSECUREDEBUG_FILE), --securedebug) -ifeq ($(CONFIG_USE_PSPSECUREOS),y) +OPT_PUBSIGNEDKEY_FILE=$(call add_opt_prefix, $(PUBSIGNEDKEY_FILE), --rtmpubkey) +OPT_SMUFW1_SUB1_FILE=$(call add_opt_prefix, $(PSP_SMUFW1_SUB1_FILE), --subprogram 1 --smufirmware) +OPT_SMUFW1_SUB2_FILE=$(call add_opt_prefix, $(PSP_SMUFW1_SUB2_FILE), --subprogram 2 --smufirmware) +OPT_SMUFW2_SUB1_FILE=$(call add_opt_prefix, $(PSP_SMUFW2_SUB1_FILE), --subprogram 1 --smufirmware2) +OPT_SMUFW2_SUB2_FILE=$(call add_opt_prefix, $(PSP_SMUFW2_SUB2_FILE), --subprogram 2 --smufirmware2) +OPT_PSP_SEC_DBG_KEY_FILE=$(call add_opt_prefix, $(PSP_SEC_DBG_KEY_FILE), --securedebug) +OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse) OPT_PSPSCUREOS_FILE=$(call add_opt_prefix, $(PSPSCUREOS_FILE), --secureos) OPT_PSPTRUSTLETS_FILE=$(call add_opt_prefix, $(PSPTRUSTLETS_FILE), --trustlets) -OPT_TRUSTLETKEY_FILE=$(call add_opt_prefix, $(TRUSTLETKEY_FILE), --trustletkey) -endif -OPT_SMUFIRMWARE2_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FILE), --smufirmware2) -OPT_SMUSCS_FILE=$(call add_opt_prefix, $(SMUSCS_FILE), --smuscs) +OPT_SEC_DEBUG_FILE=$(call add_opt_prefix, $(PSP_SEC_DEBUG_FILE), --secdebug) +OPT_IKEK_FILE=$(call add_opt_prefix, $(PSP_IKEK_FILE), --ikek) +OPT_SECG1_FILE=$(call add_opt_prefix, $(PSP_SECG1_FILE), --subprog 1 --sec-gasket) +OPT_SECG2_FILE=$(call add_opt_prefix, $(PSP_SECG2_FILE), --subprog 2 --sec-gasket) +OPT_MP2FW1_FILE=$(call add_opt_prefix, $(PSP_MP2FW1_FILE), --subprog 1 --mp2-fw) +OPT_MP2FW2_FILE=$(call add_opt_prefix, $(PSP_MP2FW2_FILE), --subprog 2 --mp2-fw) +OPT_DRIVERS_FILE=$(call add_opt_prefix, $(PSP_DRIVERS_FILE), --drv-entry-pts) +OPT_PSP_S0I3_FILE=$(call add_opt_prefix, $(PSP_S0I3_FILE), --s0i3drv) +OPT_ABL0_FILE=$(call add_opt_prefix, $(PSP_ABL0_FILE), --abl-image) +OPT_ABL1_FILE=$(call add_opt_prefix, $(PSP_ABL1_FILE), --abl-image) +OPT_ABL2_FILE=$(call add_opt_prefix, $(PSP_ABL2_FILE), --abl-image) +OPT_ABL3_FILE=$(call add_opt_prefix, $(PSP_ABL3_FILE), --abl-image) +OPT_ABL4_FILE=$(call add_opt_prefix, $(PSP_ABL4_FILE), --abl-image) +OPT_ABL5_FILE=$(call add_opt_prefix, $(PSP_ABL5_FILE), --abl-image) +OPT_ABL6_FILE=$(call add_opt_prefix, $(PSP_ABL6_FILE), --abl-image) +OPT_ABL7_FILE=$(call add_opt_prefix, $(PSP_ABL7_FILE), --abl-image) +OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist) + +OPT_PSP_APCB_FILE=$(call add_opt_prefix, $(PSP_APCB_FILE), --apcb) +OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base) +OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin) +OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest) +OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size) +OPT_APOBNV_ADDR=$(call add_opt_prefix, $(PSP_APOBNV_BASE), --apob-nv-base) +OPT_APOBNV_SIZE=$(call add_opt_prefix, $(PSP_APOBNV_SIZE), --apob-nv-size) +OPT_PSP_PMUI_FILE1=$(call add_opt_prefix, $(PSP_PMUI_FILE1), --subprogram 0 --instance 1 --pmu-inst) +OPT_PSP_PMUI_FILE2=$(call add_opt_prefix, $(PSP_PMUI_FILE2), --subprogram 0 --instance 4 --pmu-inst) +OPT_PSP_PMUI_FILE3=$(call add_opt_prefix, $(PSP_PMUI_FILE3), --subprogram 1 --instance 1 --pmu-inst) +OPT_PSP_PMUI_FILE4=$(call add_opt_prefix, $(PSP_PMUI_FILE4), --subprogram 1 --instance 4 --pmu-inst) +OPT_PSP_PMUD_FILE1=$(call add_opt_prefix, $(PSP_PMUD_FILE1), --subprogram 0 --instance 1 --pmu-data) +OPT_PSP_PMUD_FILE2=$(call add_opt_prefix, $(PSP_PMUD_FILE2), --subprogram 0 --instance 4 --pmu-data) +OPT_PSP_PMUD_FILE3=$(call add_opt_prefix, $(PSP_PMUD_FILE3), --subprogram 1 --instance 1 --pmu-data) +OPT_PSP_PMUD_FILE4=$(call add_opt_prefix, $(PSP_PMUD_FILE4), --subprogram 1 --instance 4 --pmu-data) +OPT_PSP_UCODE_FILE1=$(call add_opt_prefix, $(PSP_UCODE_FILE1), --instance 0 --ucode) +OPT_PSP_UCODE_FILE2=$(call add_opt_prefix, $(PSP_UCODE_FILE2), --instance 1 --ucode) +OPT_PSP_UCODE_FILE3=$(call add_opt_prefix, $(PSP_UCODE_FILE3), --instance 2 --ucode) +OPT_MP2CFG_FILE=$(call add_opt_prefix, $(PSP_MP2CFG_FILE), --mp2-config) $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \ $(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \ $(call strip_quotes, $(PSPBTLDR_FILE)) \ - $(call strip_quotes, $(PSPRCVR_FILE)) \ $(call strip_quotes, $(PSPSCUREOS_FILE)) \ - $(call strip_quotes, $(PSPNVRAM_FILE)) \ - $(call strip_quotes, $(SMUFWM_FILE)) \ - $(call strip_quotes, $(SMUSCS_FILE)) \ - $(call strip_quotes, $(PSPSECUREDEBUG_FILE)) \ + $(call strip_quotes, $(PSP_SEC_DBG_KEY_FILE)) \ $(call strip_quotes, $(PSPTRUSTLETS_FILE)) \ - $(call strip_quotes, $(TRUSTLETKEY_FILE)) \ - $(call strip_quotes, $(SMUFIRMWARE2_FILE)) \ + $(call strip_quotes, $(PSP_APCB_FILE)) \ + $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \ + $(call strip_quotes, $(PSP_PMUI_FILE1)) \ + $(call strip_quotes, $(PSP_PMUI_FILE2)) \ + $(call strip_quotes, $(PSP_PMUI_FILE3)) \ + $(call strip_quotes, $(PSP_PMUI_FILE4)) \ + $(call strip_quotes, $(PSP_PMUD_FILE1)) \ + $(call strip_quotes, $(PSP_PMUD_FILE2)) \ + $(call strip_quotes, $(PSP_PMUD_FILE3)) \ + $(call strip_quotes, $(PSP_PMUD_FILE4)) \ + $(call strip_quotes, $(PSP_UCODE_FILE1)) \ + $(call strip_quotes, $(PSP_UCODE_FILE2)) \ + $(call strip_quotes, $(PSP_UCODE_FILE3)) \ + $(call strip_quotes, $(PSP_MP2CFG_FILE)) \ + $(call strip_quotes, $(PSP_SMUFW1_SUB1_FILE)) \ + $(call strip_quotes, $(PSP_SMUFW1_SUB2_FILE)) \ + $(call strip_quotes, $(PSP_SMUFW2_SUB1_FILE)) \ + $(call strip_quotes, $(PSP_SMUFW2_SUB2_FILE)) \ + $(call strip_quotes, $(PSP_ABL0_FILE)) \ + $(call strip_quotes, $(PSP_ABL1_FILE)) \ + $(call strip_quotes, $(PSP_ABL2_FILE)) \ + $(call strip_quotes, $(PSP_ABL3_FILE)) \ + $(call strip_quotes, $(PSP_ABL4_FILE)) \ + $(call strip_quotes, $(PSP_ABL5_FILE)) \ + $(call strip_quotes, $(PSP_ABL6_FILE)) \ + $(call strip_quotes, $(PSP_ABL7_FILE)) \ + $(call strip_quotes, $(PSP_WHITELIST_FILE)) \ + $(call strip_quotes, $(PSP_SECG1_FILE)) \ + $(call strip_quotes, $(PSP_SECG2_FILE)) \ + $(call_strip_quotes, $(PSP_DRIVERS_FILE)) \ + $(call_strip_quotes, $(PSP_S0I3_FILE)) \ + $(call_strip_quotes, $(PSP_IKEK_FILE)) \ + $(call_strip_quotes, $(PSP_SEC_DEBUG_FILE)) \ $(AMDFWTOOL) rm -f $@ @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" $(AMDFWTOOL) \ $(OPT_AMD_PUBKEY_FILE) \ $(OPT_PSPBTLDR_FILE) \ - $(OPT_SMUFWM_FILE) \ - $(OPT_PSPRCVR_FILE) \ $(OPT_PUBSIGNEDKEY_FILE) \ $(OPT_PSPSCUREOS_FILE) \ - $(OPT_PSPNVRAM_FILE) \ - $(OPT_PSPSECUREDEBUG_FILE) \ + $(OPT_PSP_SEC_DBG_KEY_FILE) \ $(OPT_PSPTRUSTLETS_FILE) \ - $(OPT_TRUSTLETKEY_FILE) \ - $(OPT_SMUFIRMWARE2_FILE) \ - $(OPT_SMUSCS_FILE) \ - $(OPT_AMD_PUBKEY_FILE) \ - $(OPT_PSPBTLDR_FILE) \ - $(OPT_SMUFWM_FILE) \ - $(OPT_PSPRCVR_FILE) \ - $(OPT_PUBSIGNEDKEY_FILE) \ - $(OPT_PSPSCUREOS_FILE) \ - $(OPT_PSPNVRAM_FILE) \ - $(OPT_PSPSECUREDEBUG_FILE) \ - $(OPT_PSPTRUSTLETS_FILE) \ - $(OPT_TRUSTLETKEY_FILE) \ - $(OPT_SMUFIRMWARE2_FILE) \ - $(OPT_SMUSCS_FILE) \ + $(OPT_SMUFW1_SUB2_FILE) \ + $(OPT_SMUFW2_SUB2_FILE) \ + $(OPT_SMUFW1_SUB1_FILE) \ + $(OPT_SMUFW2_SUB1_FILE) \ + $(OPT_PSP_APCB_FILE) \ + $(OPT_APOB_ADDR) \ + $(OPT_APOBNV_ADDR) \ + $(OPT_APOBNV_SIZE) \ + $(OPT_PSP_BIOSBIN_FILE) \ + $(OPT_PSP_BIOSBIN_DEST) \ + $(OPT_PSP_BIOSBIN_SIZE) \ + $(OPT_PSP_SOFTFUSE) \ + $(OPT_PSP_PMUI_FILE1) \ + $(OPT_PSP_PMUI_FILE2) \ + $(OPT_PSP_PMUI_FILE3) \ + $(OPT_PSP_PMUI_FILE4) \ + $(OPT_PSP_PMUD_FILE1) \ + $(OPT_PSP_PMUD_FILE2) \ + $(OPT_PSP_PMUD_FILE3) \ + $(OPT_PSP_PMUD_FILE4) \ + $(OPT_PSP_UCODE_FILE1) \ + $(OPT_PSP_UCODE_FILE2) \ + $(OPT_PSP_UCODE_FILE3) \ + $(OPT_MP2CFG_FILE) \ + $(OPT_ABL0_FILE) \ + $(OPT_ABL1_FILE) \ + $(OPT_ABL2_FILE) \ + $(OPT_ABL3_FILE) \ + $(OPT_ABL4_FILE) \ + $(OPT_ABL5_FILE) \ + $(OPT_ABL6_FILE) \ + $(OPT_ABL7_FILE) \ + $(OPT_WHITELIST_FILE) \ + $(OPT_SECG1_FILE) \ + $(OPT_SECG2_FILE) \ + $(OPT_MP2FW1_FILE) \ + $(OPT_MP2FW2_FILE) \ + $(OPT_DRIVERS_FILE) \ + $(OPT_PSP_S0I3_FILE) \ + $(OPT_IKEK_FILE) \ + $(OPT_SEC_DEBUG_FILE) \ --combo-capable \ + --token-unlock \ --flashsize $(CONFIG_ROM_SIZE) \ --location $(shell printf "0x%x" $(PICASSO_FWM_POSITION)) \ --output $@ +USE_BIOS_FILE=$(obj)/cbfs/fallback/romstage.elf +$(PSP_BIOSBIN_FILE): $(obj)/cbfs/fallback/romstage.elf $(AMDCOMPRESS) + rm -f $@ + @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n" + $(AMDCOMPRESS) --infile $(USE_BIOS_FILE) --outfile $@ --compress \ + --maxsize $(PSP_BIOSBIN_SIZE) + ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) PHONY+=add_amdfw INTERMEDIATE+=add_amdfw @@ -229,8 +394,9 @@ PICASSO_FWM_ROM_POSITION=$(call int-add, \ add_amdfw: $(obj)/coreboot.pre $(obj)/amdfw.rom printf " DD Adding AMD Firmware at ROM offset 0x%x\n" \ "$(PICASSO_FWM_ROM_POSITION)" - dd if=$(obj)/amdfw.rom \ - of=$(obj)/coreboot.pre conv=notrunc bs=1 \ + dd oflag=seek_bytes \ + if=$(obj)/amdfw.rom \ + of=$(obj)/coreboot.pre conv=notrunc \ seek=$(PICASSO_FWM_ROM_POSITION) >/dev/null 2>&1 else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) @@ -242,11 +408,4 @@ apu/amdfw-type := raw endif # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) -cbfs-files-y += smu_fw -cbfs-files-y += smu_fw2 -smu_fw-file := $(SMUFWM_FILE) -smu_fw-type := raw -smu_fw2-file := $(SMUFIRMWARE2_FILE) -smu_fw2-type := raw - endif # ($(CONFIG_SOC_AMD_PICASSO),y) |