diff options
| -rw-r--r-- | src/soc/intel/skylake/gpio.c | 12 | ||||
| -rw-r--r-- | src/soc/intel/skylake/include/soc/gpio.h | 34 | ||||
| -rw-r--r-- | src/soc/intel/skylake/pmutil.c | 6 |
3 files changed, 26 insertions, 26 deletions
diff --git a/src/soc/intel/skylake/gpio.c b/src/soc/intel/skylake/gpio.c index 9f7b409e5c..79672315cd 100644 --- a/src/soc/intel/skylake/gpio.c +++ b/src/soc/intel/skylake/gpio.c @@ -25,8 +25,8 @@ #include <soc/pm.h> /* Keep the ordering intact GPP_A ~ G, GPD. - * As the gpio/smi functions get_smi_status() and - * enable_gpio_groupsmi() depends on this ordering. + * As the gpio/smi functions gpio_get_smi_status() and + * gpio_enable_groupsmi() depends on this ordering. */ static const GPIO_GROUP_INFO gpio_group_info[] = { /* GPP_A */ @@ -245,7 +245,7 @@ void gpio_set(gpio_t gpio_num, int value) WRITE, &outputvalue); } -void clear_all_smi(void) +void gpio_clear_all_smi(void) { u32 gpiogroupinfolength; u32 gpioindex = 0; @@ -264,7 +264,7 @@ void clear_all_smi(void) } } -void get_smi_status(u32 status[GPIO_COMMUNITY_MAX]) +void gpio_get_smi_status(u32 status[GPIO_COMMUNITY_MAX]) { u32 num_of_communities; u32 gpioindex; @@ -285,7 +285,7 @@ void get_smi_status(u32 status[GPIO_COMMUNITY_MAX]) } } -void enable_all_smi(void) +void gpio_enable_all_smi(void) { u32 gpiogroupinfolength; u32 gpioindex = 0; @@ -304,7 +304,7 @@ void enable_all_smi(void) } } -void enable_gpio_groupsmi(gpio_t gpio_num, u32 mask) +void gpio_enable_groupsmi(gpio_t gpio_num, u32 mask) { u32 gpioindex = 0; u32 smien = 0; diff --git a/src/soc/intel/skylake/include/soc/gpio.h b/src/soc/intel/skylake/include/soc/gpio.h index 1d49a4599d..e8438ff99d 100644 --- a/src/soc/intel/skylake/include/soc/gpio.h +++ b/src/soc/intel/skylake/include/soc/gpio.h @@ -23,6 +23,23 @@ #include <stdint.h> +/* SOC has 8 GPIO communities GPP A~G, GPD */ +#define GPIO_COMMUNITY_MAX 8 + +typedef int gpio_t; + +/* Clear GPIO SMI Status */ +void gpio_clear_all_smi(void); + +/* Get GPIO SMI Status */ +void gpio_get_smi_status(u32 status[GPIO_COMMUNITY_MAX]); + +/* Enable GPIO SMI */ +void gpio_enable_all_smi(void); + +/* Enable GPIO individual Group SMI */ +void gpio_enable_groupsmi(gpio_t gpio_num, u32 mask); + /* * GPP_Ax to GPP_Gx; * where x=24 [between GPIO Community A to F] @@ -123,9 +140,6 @@ typedef struct { #define V_PCH_GPIO_GPP_G_PAD_MAX 8 #define V_PCH_GPIO_GPD_PAD_MAX 12 -/* SOC has 8 GPIO communities GPP A~G, GPD */ -#define GPIO_COMMUNITY_MAX 8 - #define GPIO_GET_GROUP_INDEX(group) (group & 0xFF) #define GPIO_GET_GROUP_INDEX_FROM_PAD(pad) (\ GPIO_GET_GROUP_INDEX((pad >> 16))) @@ -295,20 +309,6 @@ typedef enum { GpioResetResume = 0x7 /* Resume Reset */ } GPIO_RESET_CONFIG; -typedef int gpio_t; - -/* Clear GPIO SMI Status */ -void clear_all_smi(void); - -/* Get GPIO SMI Status */ -void get_smi_status(u32 status[GPIO_COMMUNITY_MAX]); - -/* Enable GPIO SMI */ -void enable_all_smi(void); - -/* Enable GPIO individual Group SMI */ -void enable_gpio_groupsmi(gpio_t gpio_num, u32 mask); - /* * GPIO Electrical Configuration * Set GPIO termination and Pad Tolerance (applicable only for some pads) diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c index c22a12083b..85dc1b3fda 100644 --- a/src/soc/intel/skylake/pmutil.c +++ b/src/soc/intel/skylake/pmutil.c @@ -219,7 +219,7 @@ void disable_smi(u32 mask) void reset_alt_smi_status(void) { /*Clear GPIO SMI Status*/ - clear_all_smi(); + gpio_clear_all_smi(); } /* Print GPIO SMI status bits */ @@ -237,7 +237,7 @@ static u32 print_alt_smi_status(void) }; printk(BIOS_DEBUG, "ALT_STS: "); - get_smi_status(alt_sts); + gpio_get_smi_status(alt_sts); /* GPP_A to GPP_E GPIO has Status and Enable functionality*/ for (gpio_index = 0; gpio_index < ARRAY_SIZE(gpiowell); gpio_index++) { @@ -262,7 +262,7 @@ u32 clear_alt_smi_status(void) void enable_alt_smi(int gpionum, u32 mask) { /*Set GPIO EN Status*/ - enable_gpio_groupsmi(gpionum, mask); + gpio_enable_groupsmi(gpionum, mask); } |