diff options
| -rw-r--r-- | src/include/device/pci_ids.h | 18 | ||||
| -rw-r--r-- | src/soc/intel/common/block/i2c/i2c.c | 18 |
2 files changed, 24 insertions, 12 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index c7b875ce7b..967f657047 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3900,12 +3900,18 @@ #define PCI_DID_INTEL_LNL_I2C4 0xa850 #define PCI_DID_INTEL_LNL_I2C5 0xa851 -#define PCI_DID_INTEL_PTL_I2C0 0xe478 -#define PCI_DID_INTEL_PTL_I2C1 0xe479 -#define PCI_DID_INTEL_PTL_I2C2 0xe47a -#define PCI_DID_INTEL_PTL_I2C3 0xe47b -#define PCI_DID_INTEL_PTL_I2C4 0xe450 -#define PCI_DID_INTEL_PTL_I2C5 0xe451 +#define PCI_DID_INTEL_PTL_H_I2C0 0xe478 +#define PCI_DID_INTEL_PTL_H_I2C1 0xe479 +#define PCI_DID_INTEL_PTL_H_I2C2 0xe47a +#define PCI_DID_INTEL_PTL_H_I2C3 0xe47b +#define PCI_DID_INTEL_PTL_H_I2C4 0xe450 +#define PCI_DID_INTEL_PTL_H_I2C5 0xe451 +#define PCI_DID_INTEL_PTL_U_H_I2C0 0xe378 +#define PCI_DID_INTEL_PTL_U_H_I2C1 0xe379 +#define PCI_DID_INTEL_PTL_U_H_I2C2 0xe37a +#define PCI_DID_INTEL_PTL_U_H_I2C3 0xe37b +#define PCI_DID_INTEL_PTL_U_H_I2C4 0xe350 +#define PCI_DID_INTEL_PTL_U_H_I2C5 0xe351 /* Intel UART device Ids */ #define PCI_DID_INTEL_LPT_LP_UART0 0x9c63 diff --git a/src/soc/intel/common/block/i2c/i2c.c b/src/soc/intel/common/block/i2c/i2c.c index f84b2cd328..679d425a90 100644 --- a/src/soc/intel/common/block/i2c/i2c.c +++ b/src/soc/intel/common/block/i2c/i2c.c @@ -174,12 +174,18 @@ struct device_operations i2c_dev_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DID_INTEL_PTL_I2C0, - PCI_DID_INTEL_PTL_I2C1, - PCI_DID_INTEL_PTL_I2C2, - PCI_DID_INTEL_PTL_I2C3, - PCI_DID_INTEL_PTL_I2C4, - PCI_DID_INTEL_PTL_I2C5, + PCI_DID_INTEL_PTL_H_I2C0, + PCI_DID_INTEL_PTL_H_I2C1, + PCI_DID_INTEL_PTL_H_I2C2, + PCI_DID_INTEL_PTL_H_I2C3, + PCI_DID_INTEL_PTL_H_I2C4, + PCI_DID_INTEL_PTL_H_I2C5, + PCI_DID_INTEL_PTL_U_H_I2C0, + PCI_DID_INTEL_PTL_U_H_I2C1, + PCI_DID_INTEL_PTL_U_H_I2C2, + PCI_DID_INTEL_PTL_U_H_I2C3, + PCI_DID_INTEL_PTL_U_H_I2C4, + PCI_DID_INTEL_PTL_U_H_I2C5, PCI_DID_INTEL_LNL_I2C0, PCI_DID_INTEL_LNL_I2C1, PCI_DID_INTEL_LNL_I2C2, |