diff options
4 files changed, 58 insertions, 6 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index 3f72015c21..50c842b252 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -103,8 +103,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { PAD_GPI(GPIO_4, PULL_UP), /* PEN_POWER_EN - Enabled*/ PAD_GPO(GPIO_5, HIGH), - /* DMIC_SEL */ - PAD_GPO(GPIO_6, LOW), // Select Camera 1 Dmic + /* EN_PWR_TOUCHPAD */ + PAD_GPO(GPIO_6, HIGH), /* I2S_SDIN */ PAD_NF(GPIO_7, ACP_I2S_SDIN, PULL_NONE), /* I2S_LRCLK - Bit banged in depthcharge */ @@ -134,12 +134,12 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { PAD_GPI(GPIO_31, PULL_UP), /* */ PAD_GPI(GPIO_32, PULL_DOWN), - /* EN_PWR_TOUCHPAD_PS2 */ + /* DMIC_SEL */ /* - * EN_PWR_TOUCHPAD_PS2 - Make sure Ext ROM Sharing is disabled before - * using this GPIO. Otherwise SPI flash access will be very slow. + * Make sure Ext ROM Sharing is disabled before using this GPIO. Otherwise SPI flash + * access will be very slow. */ - PAD_GPO(GPIO_67, HIGH), + PAD_GPO(GPIO_67, LOW), // Select Camera 1 Dmic /* EMMC_RESET */ PAD_GPO(GPIO_68, LOW), /* RAM ID 3*/ diff --git a/src/mainboard/google/zork/variants/dalboz/gpio.c b/src/mainboard/google/zork/variants/dalboz/gpio.c index 3e705a6b34..a4813e90fb 100644 --- a/src/mainboard/google/zork/variants/dalboz/gpio.c +++ b/src/mainboard/google/zork/variants/dalboz/gpio.c @@ -9,12 +9,23 @@ /* This table is used by dalboz variant with board version < 2. */ static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = { + /* DMIC_SEL */ + PAD_GPO(GPIO_6, LOW), // Select Camera 1 DMIC /* USB_OC2_L - USB A0 & A1 */ PAD_NF(GPIO_18, USB_OC2_L, PULL_UP), + /* EN_PWR_TOUCHPAD_PS2 */ + PAD_GPO(GPIO_67, HIGH), /* Unused */ PAD_GPI(GPIO_143, PULL_DOWN), }; +static const struct soc_amd_gpio bid_2_gpio_set_stage_ram[] = { + /* DMIC_SEL */ + PAD_GPO(GPIO_6, LOW), // Select Camera 1 DMIC + /* EN_PWR_TOUCHPAD_PS2 */ + PAD_GPO(GPIO_67, HIGH), +}; + const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) { uint32_t board_version; @@ -30,6 +41,9 @@ const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) if (board_version < 2) { *size = ARRAY_SIZE(bid_1_gpio_set_stage_ram); return bid_1_gpio_set_stage_ram; + } else if (board_version == 2) { + *size = ARRAY_SIZE(bid_2_gpio_set_stage_ram); + return bid_2_gpio_set_stage_ram; } *size = 0; diff --git a/src/mainboard/google/zork/variants/vilboz/Makefile.inc b/src/mainboard/google/zork/variants/vilboz/Makefile.inc index dc1e4117f9..af38c8828d 100644 --- a/src/mainboard/google/zork/variants/vilboz/Makefile.inc +++ b/src/mainboard/google/zork/variants/vilboz/Makefile.inc @@ -3,3 +3,4 @@ subdirs-y += ./spd ramstage-y += variant.c +ramstage-y += gpio.c diff --git a/src/mainboard/google/zork/variants/vilboz/gpio.c b/src/mainboard/google/zork/variants/vilboz/gpio.c new file mode 100644 index 0000000000..44d3f89059 --- /dev/null +++ b/src/mainboard/google/zork/variants/vilboz/gpio.c @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <boardid.h> +#include <gpio.h> +#include <soc/gpio.h> +#include <ec/google/chromeec/ec.h> + +/* This table is used by dalboz variant with board version < 2. */ +static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = { + /* DMIC_SEL */ + PAD_GPO(GPIO_6, LOW), // Select Camera 1 DMIC + /* EN_PWR_TOUCHPAD_PS2 */ + PAD_GPO(GPIO_67, HIGH), +}; + +const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) +{ + uint32_t board_version; + + /* + * If board version cannot be read, assume that this is an older revision of the board + * and so apply overrides. If board version is provided by the EC, then apply overrides + * if version < 2. + */ + if (google_chromeec_cbi_get_board_version(&board_version)) + board_version = 1; + + if (board_version < 2) { + *size = ARRAY_SIZE(bid_1_gpio_set_stage_ram); + return bid_1_gpio_set_stage_ram; + } + + *size = 0; + return NULL; +} |