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-rw-r--r--src/mainboard/google/poppy/variants/nautilus/devicetree.cb8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
index 46b0946c2b..50137896aa 100644
--- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
@@ -163,11 +163,11 @@ chip soc/intel/skylake
register "PcieRpLtrEnable[0]" = "1"
register "usb2_ports[0]" = "USB2_PORT_LONG(OC0)" # Type-C Port 1
- register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port
- register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
+ register "usb2_ports[1]" = "USB2_PORT_SHORT(OC_SKIP)" # Type-A Port
+ register "usb2_ports[2]" = "USB2_PORT_SHORT(OC_SKIP)" # Bluetooth
register "usb2_ports[4]" = "USB2_PORT_LONG(OC1)" # Type-C Port 2
- register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port
- register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port
+ register "usb2_ports[6]" = "USB2_PORT_SHORT(OC_SKIP)" # H1
+ register "usb2_ports[8]" = "USB2_PORT_SHORT(OC_SKIP)" # Camera
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-C Port 1
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-C Port 2