diff options
57 files changed, 39 insertions, 51 deletions
diff --git a/src/arch/riscv/sbi.c b/src/arch/riscv/sbi.c index a5f3fd4065..e0d7c60e5f 100644 --- a/src/arch/riscv/sbi.c +++ b/src/arch/riscv/sbi.c @@ -20,7 +20,6 @@ #include <sbi.h> #include <vm.h> #include <console/uart.h> -#include <console/console.h> #include <commonlib/helpers.h> static uintptr_t send_ipi(uintptr_t *pmask, intptr_t type) diff --git a/src/device/oprom/include/x86emu/x86emu.h b/src/device/oprom/include/x86emu/x86emu.h index fa23e55cd3..4ae82d96ff 100644 --- a/src/device/oprom/include/x86emu/x86emu.h +++ b/src/device/oprom/include/x86emu/x86emu.h @@ -42,7 +42,6 @@ #define __X86EMU_X86EMU_H #include <stddef.h> -#include <console/console.h> #if CONFIG(X86EMU_DEBUG) #define DEBUG #endif diff --git a/src/drivers/amd/agesa/state_machine.c b/src/drivers/amd/agesa/state_machine.c index c6e36b2259..dfd64c3d52 100644 --- a/src/drivers/amd/agesa/state_machine.c +++ b/src/drivers/amd/agesa/state_machine.c @@ -16,17 +16,15 @@ #include <stdint.h> #include <string.h> - #include <arch/acpi.h> #include <arch/cpu.h> #include <bootstate.h> #include <cbfs.h> - +#include <console/console.h> #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/agesa_helper.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <amdlib.h> - #include <AMD.h> #if CONFIG(CPU_AMD_AGESA_OPENSOURCE) diff --git a/src/drivers/generic/gpio_keys/gpio_keys.c b/src/drivers/generic/gpio_keys/gpio_keys.c index 6e18a8a1b0..2cf8f28e0b 100644 --- a/src/drivers/generic/gpio_keys/gpio_keys.c +++ b/src/drivers/generic/gpio_keys/gpio_keys.c @@ -15,7 +15,6 @@ #include <arch/acpi_device.h> #include <arch/acpigen.h> -#include <console/console.h> #include <device/device.h> #include <device/path.h> #include <string.h> diff --git a/src/drivers/generic/gpio_regulator/gpio_regulator.c b/src/drivers/generic/gpio_regulator/gpio_regulator.c index 3b335252bb..3b7718c6f0 100644 --- a/src/drivers/generic/gpio_regulator/gpio_regulator.c +++ b/src/drivers/generic/gpio_regulator/gpio_regulator.c @@ -15,7 +15,6 @@ #include <arch/acpi_device.h> #include <arch/acpigen.h> -#include <console/console.h> #include <device/device.h> #include <device/path.h> #include <string.h> diff --git a/src/drivers/intel/fsp1_0/fsp_util.h b/src/drivers/intel/fsp1_0/fsp_util.h index e0da19e8ac..e09bbd9b65 100644 --- a/src/drivers/intel/fsp1_0/fsp_util.h +++ b/src/drivers/intel/fsp1_0/fsp_util.h @@ -17,6 +17,8 @@ #define FSP_UTIL_H #include <chipset_fsp_util.h> +#include <console/console.h> + #include "fsp_values.h" #if CONFIG(ENABLE_MRC_CACHE) diff --git a/src/drivers/intel/gma/int15.c b/src/drivers/intel/gma/int15.c index 5caa1b38d8..80949d1bf8 100644 --- a/src/drivers/intel/gma/int15.c +++ b/src/drivers/intel/gma/int15.c @@ -16,6 +16,8 @@ #include <x86emu/x86emu.h> #include <arch/interrupt.h> +#include <console/console.h> + #include "int15.h" static int active_lfp, pfit, display, panel_type; diff --git a/src/include/device/azalia_device.h b/src/include/device/azalia_device.h index 9ff332e964..343e261d06 100644 --- a/src/include/device/azalia_device.h +++ b/src/include/device/azalia_device.h @@ -17,11 +17,9 @@ #define DEVICE_AZALIA_H #include <types.h> -#include <console/console.h> #include <arch/acpi.h> #include <device/mmio.h> #include <arch/interrupt.h> - #include <device/device.h> void azalia_audio_init(struct device *dev); diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 728674f0da..91368fb67d 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -15,6 +15,7 @@ */ #include <assert.h> +#include <console/console.h> #include <string.h> #include <stdlib.h> #include <boot_device.h> diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index faa937b381..df2d1ffa96 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <console/console.h> #include <console/cbmem_console.h> #include <console/uart.h> #include <cbmem.h> diff --git a/src/lib/fit.c b/src/lib/fit.c index 4e2b75c1a4..a8bca47bdc 100644 --- a/src/lib/fit.c +++ b/src/lib/fit.c @@ -16,6 +16,7 @@ */ #include <assert.h> +#include <console/console.h> #include <endian.h> #include <stdint.h> #include <bootmem.h> diff --git a/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c b/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c index af5d34e613..056daa248b 100644 --- a/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c +++ b/src/mainboard/amd/db-ft3b-lc/BiosCallOuts.c @@ -15,6 +15,7 @@ */ #include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <device/azalia.h> #include <FchPlatform.h> diff --git a/src/mainboard/amd/lamar/BiosCallOuts.c b/src/mainboard/amd/lamar/BiosCallOuts.c index 8891abb57d..8e49e8e966 100644 --- a/src/mainboard/amd/lamar/BiosCallOuts.c +++ b/src/mainboard/amd/lamar/BiosCallOuts.c @@ -14,6 +14,7 @@ */ #include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <FchPlatform.h> #include <stdlib.h> diff --git a/src/mainboard/amd/olivehillplus/BiosCallOuts.c b/src/mainboard/amd/olivehillplus/BiosCallOuts.c index e3107b18a5..8975dc8e5d 100644 --- a/src/mainboard/amd/olivehillplus/BiosCallOuts.c +++ b/src/mainboard/amd/olivehillplus/BiosCallOuts.c @@ -14,6 +14,7 @@ */ #include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <FchPlatform.h> #include <stdlib.h> diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c index 65ed138c8d..1d89e4d6d1 100644 --- a/src/mainboard/amd/thatcher/romstage.c +++ b/src/mainboard/amd/thatcher/romstage.c @@ -16,10 +16,10 @@ #include <stdint.h> #include <device/pci_def.h> #include <arch/io.h> +#include <console/console.h> #include <device/pci_ops.h> #include <northbridge/amd/agesa/state_machine.h> #include <southbridge/amd/agesa/hudson/hudson.h> - #include <superio/smsc/lpc47n217/lpc47n217.h> #define SERIAL_DEV PNP_DEV(0x2e, LPC47N217_SP1) diff --git a/src/mainboard/asus/am1i-a/BiosCallOuts.c b/src/mainboard/asus/am1i-a/BiosCallOuts.c index a1018b3e5f..ce547419d2 100644 --- a/src/mainboard/asus/am1i-a/BiosCallOuts.c +++ b/src/mainboard/asus/am1i-a/BiosCallOuts.c @@ -17,6 +17,7 @@ #include <device/azalia.h> #include <AGESA.h> +#include <console/console.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/state_machine.h> #include <FchPlatform.h> diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index 2727904641..d5acdb55e3 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -15,15 +15,14 @@ */ #include <arch/io.h> +#include <console/console.h> #include <device/pnp_type.h> #include <device/pci_ops.h> - #include <northbridge/amd/agesa/state_machine.h> #include <southbridge/amd/common/amd_defs.h> #include <southbridge/amd/agesa/hudson/hudson.h> #include <southbridge/amd/agesa/hudson/smbus.h> #include <stdint.h> - #include <superio/ite/common/ite.h> #include <superio/ite/it8728f/it8728f.h> #include <superio/nuvoton/common/nuvoton.h> diff --git a/src/mainboard/asus/m4a785-m/acpi_tables.c b/src/mainboard/asus/m4a785-m/acpi_tables.c index 1170ed7a49..cb263f90f2 100644 --- a/src/mainboard/asus/m4a785-m/acpi_tables.c +++ b/src/mainboard/asus/m4a785-m/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <console/console.h> #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> diff --git a/src/mainboard/cubietech/cubieboard/bootblock.c b/src/mainboard/cubietech/cubieboard/bootblock.c index e1eb8206e7..05e3847d39 100644 --- a/src/mainboard/cubietech/cubieboard/bootblock.c +++ b/src/mainboard/cubietech/cubieboard/bootblock.c @@ -22,7 +22,6 @@ #include <device/mmio.h> #include <bootblock_common.h> #include <console/uart.h> -#include <console/console.h> #include <delay.h> #include <cpu/allwinner/a10/gpio.h> #include <cpu/allwinner/a10/clock.h> diff --git a/src/mainboard/google/beltino/smihandler.c b/src/mainboard/google/beltino/smihandler.c index 1a03f2340b..e786ef56fd 100644 --- a/src/mainboard/google/beltino/smihandler.c +++ b/src/mainboard/google/beltino/smihandler.c @@ -15,7 +15,6 @@ */ #include <arch/acpi.h> -#include <console/console.h> #include <cpu/intel/haswell/haswell.h> #include <cpu/x86/smm.h> #include <northbridge/intel/haswell/haswell.h> @@ -24,6 +23,7 @@ #include <southbridge/intel/lynxpoint/pch.h> #include <elog.h> #include <superio/ite/it8772f/it8772f.h> + #include "onboard.h" void mainboard_smi_sleep(u8 slp_typ) diff --git a/src/mainboard/google/daisy/chromeos.c b/src/mainboard/google/daisy/chromeos.c index c06f8394eb..968f1f9d5b 100644 --- a/src/mainboard/google/daisy/chromeos.c +++ b/src/mainboard/google/daisy/chromeos.c @@ -14,7 +14,6 @@ */ #include <boot/coreboot_tables.h> -#include <console/console.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> #include <soc/cpu.h> diff --git a/src/mainboard/google/dragonegg/romstage_fsp_params.c b/src/mainboard/google/dragonegg/romstage_fsp_params.c index e866c620d9..e357ee78c0 100644 --- a/src/mainboard/google/dragonegg/romstage_fsp_params.c +++ b/src/mainboard/google/dragonegg/romstage_fsp_params.c @@ -15,7 +15,6 @@ #include <assert.h> #include <baseboard/variants.h> -#include <console/console.h> #include <soc/romstage.h> void mainboard_memory_init_params(FSPM_UPD *mupd) diff --git a/src/mainboard/google/foster/chromeos.c b/src/mainboard/google/foster/chromeos.c index 026dd3e5dd..591cfd0025 100644 --- a/src/mainboard/google/foster/chromeos.c +++ b/src/mainboard/google/foster/chromeos.c @@ -15,7 +15,6 @@ */ #include <boot/coreboot_tables.h> -#include <console/console.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> #include <gpio.h> diff --git a/src/mainboard/google/gru/bootblock.c b/src/mainboard/google/gru/bootblock.c index 7c18e12fd1..79d9b0f640 100644 --- a/src/mainboard/google/gru/bootblock.c +++ b/src/mainboard/google/gru/bootblock.c @@ -16,7 +16,6 @@ #include <device/mmio.h> #include <bootblock_common.h> -#include <console/console.h> #include <delay.h> #include <soc/grf.h> #include <gpio.h> diff --git a/src/mainboard/google/octopus/variants/phaser/gpio.c b/src/mainboard/google/octopus/variants/phaser/gpio.c index 076476bbdd..281bde06a4 100644 --- a/src/mainboard/google/octopus/variants/phaser/gpio.c +++ b/src/mainboard/google/octopus/variants/phaser/gpio.c @@ -19,7 +19,6 @@ #include <gpio.h> #include <soc/gpio.h> #include <ec/google/chromeec/ec.h> -#include <console/console.h> #define SKU_UNKNOWN 0xFFFFFFFF diff --git a/src/mainboard/google/peach_pit/chromeos.c b/src/mainboard/google/peach_pit/chromeos.c index 00dd1f3987..b2d90d9e90 100644 --- a/src/mainboard/google/peach_pit/chromeos.c +++ b/src/mainboard/google/peach_pit/chromeos.c @@ -15,7 +15,6 @@ #include <boot/coreboot_tables.h> #include <bootmode.h> -#include <console/console.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> #include <soc/cpu.h> diff --git a/src/mainboard/google/poppy/variants/nami/smihandler.c b/src/mainboard/google/poppy/variants/nami/smihandler.c index 6816508f24..61162b40b1 100644 --- a/src/mainboard/google/poppy/variants/nami/smihandler.c +++ b/src/mainboard/google/poppy/variants/nami/smihandler.c @@ -15,8 +15,8 @@ #include <arch/acpi.h> #include <baseboard/variants.h> -#include <console/console.h> #include <delay.h> + #include "gpio.h" #define TOUCH_DISABLE GPP_C3 diff --git a/src/mainboard/google/urara/bootblock.c b/src/mainboard/google/urara/bootblock.c index 5b0b29d0f7..16e75809d3 100644 --- a/src/mainboard/google/urara/bootblock.c +++ b/src/mainboard/google/urara/bootblock.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <console/console.h> #include <device/mmio.h> #include <stdint.h> #include <soc/clocks.h> diff --git a/src/mainboard/intel/baskingridge/mainboard_smi.c b/src/mainboard/intel/baskingridge/mainboard_smi.c index 0fd0639b56..da6f8e8199 100644 --- a/src/mainboard/intel/baskingridge/mainboard_smi.c +++ b/src/mainboard/intel/baskingridge/mainboard_smi.c @@ -15,7 +15,6 @@ #include <arch/acpi.h> #include <arch/io.h> -#include <console/console.h> #include <cpu/x86/smm.h> #include <southbridge/intel/lynxpoint/nvs.h> #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c b/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c index 5ceff51f44..dd209dce55 100644 --- a/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c +++ b/src/mainboard/intel/cannonlake_rvp/spd/spd_util.c @@ -12,10 +12,11 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + #include <arch/byteorder.h> -#include <console/console.h> #include <stdint.h> #include <string.h> + #include "spd.h" void mainboard_fill_dq_map_ch0(void *dq_map_ptr) diff --git a/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c b/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c index dd33021ae5..b9ce3941f4 100644 --- a/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c +++ b/src/mainboard/intel/icelake_rvp/romstage_fsp_params.c @@ -14,12 +14,12 @@ */ #include <arch/byteorder.h> -#include <console/console.h> #include <fsp/api.h> #include <soc/romstage.h> -#include "spd/spd.h" #include <spd_bin.h> +#include "spd/spd.h" + void mainboard_memory_init_params(FSPM_UPD *mupd) { } diff --git a/src/mainboard/intel/icelake_rvp/spd/spd_util.c b/src/mainboard/intel/icelake_rvp/spd/spd_util.c index 6b733642cd..8d7eaf69ce 100644 --- a/src/mainboard/intel/icelake_rvp/spd/spd_util.c +++ b/src/mainboard/intel/icelake_rvp/spd/spd_util.c @@ -12,12 +12,13 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + #include <arch/byteorder.h> #include <arch/cpu.h> -#include <console/console.h> #include <intelblocks/mp_init.h> #include <stdint.h> #include <string.h> + #include "../board_id.h" #include "spd.h" diff --git a/src/mainboard/intel/kblrvp/spd/spd_util.c b/src/mainboard/intel/kblrvp/spd/spd_util.c index 12d9d10b36..10043843a2 100644 --- a/src/mainboard/intel/kblrvp/spd/spd_util.c +++ b/src/mainboard/intel/kblrvp/spd/spd_util.c @@ -12,12 +12,13 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + #include <arch/byteorder.h> -#include <console/console.h> #include <stdint.h> #include <string.h> #include <soc/pei_data.h> #include <soc/pei_wrapper.h> + #include "../board_id.h" #include "spd.h" diff --git a/src/mainboard/kontron/986lcd-m/mptable.c b/src/mainboard/kontron/986lcd-m/mptable.c index 2edb7daf0e..1b5d45efb3 100644 --- a/src/mainboard/kontron/986lcd-m/mptable.c +++ b/src/mainboard/kontron/986lcd-m/mptable.c @@ -15,7 +15,6 @@ #include <device/device.h> #include <device/pci.h> -#include <console/console.h> #include <arch/smp/mpspec.h> #include <arch/ioapic.h> #include <stdint.h> diff --git a/src/mainboard/roda/rk886ex/mptable.c b/src/mainboard/roda/rk886ex/mptable.c index cf87d7fa95..2db0f75964 100644 --- a/src/mainboard/roda/rk886ex/mptable.c +++ b/src/mainboard/roda/rk886ex/mptable.c @@ -16,7 +16,6 @@ #include <device/device.h> #include <device/pci.h> -#include <console/console.h> #include <arch/smp/mpspec.h> #include <arch/ioapic.h> #include <stdint.h> diff --git a/src/mainboard/sifive/hifive-unleashed/mainboard.c b/src/mainboard/sifive/hifive-unleashed/mainboard.c index 2d62cd077a..96a2678ee0 100644 --- a/src/mainboard/sifive/hifive-unleashed/mainboard.c +++ b/src/mainboard/sifive/hifive-unleashed/mainboard.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <console/console.h> +#include <device/device.h> #include <soc/sdram.h> #include <symbols.h> diff --git a/src/northbridge/amd/amdht/h3ncmn.h b/src/northbridge/amd/amdht/h3ncmn.h index f4a782d63b..c007089e03 100644 --- a/src/northbridge/amd/amdht/h3ncmn.h +++ b/src/northbridge/amd/amdht/h3ncmn.h @@ -19,8 +19,8 @@ #include <inttypes.h> #include <device/pci.h> -#include <console/console.h> #include <cpu/amd/msr.h> + #include "comlib.h" #include "h3finit.h" #include "h3ffeat.h" diff --git a/src/northbridge/amd/amdmct/mct/mct_d.h b/src/northbridge/amd/amdmct/mct/mct_d.h index 5d31d44428..14da928719 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.h +++ b/src/northbridge/amd/amdmct/mct/mct_d.h @@ -23,11 +23,11 @@ #define DQS_TRAIN_DEBUG 0 #include <inttypes.h> -#include "mct_d_gcc.h" -#include <console/console.h> #include <northbridge/amd/amdfam10/debug.h> #include <northbridge/amd/amdfam10/raminit.h> +#include "mct_d_gcc.h" + extern const u8 Table_DQSRcvEn_Offset[]; extern const u32 TestPattern0_D[]; extern const u32 TestPattern1_D[]; diff --git a/src/northbridge/amd/amdmct/mct/mctsrc.c b/src/northbridge/amd/amdmct/mct/mctsrc.c index 4689c7b982..649c1c85c2 100644 --- a/src/northbridge/amd/amdmct/mct/mctsrc.c +++ b/src/northbridge/amd/amdmct/mct/mctsrc.c @@ -14,8 +14,10 @@ * GNU General Public License for more details. */ +#include <console/console.h> #include <cpu/x86/cr.h> #include <cpu/amd/msr.h> + #include "mct_d.h" /****************************************************************************** diff --git a/src/northbridge/via/vx900/vx900.h b/src/northbridge/via/vx900/vx900.h index 9e30638892..96d821ac4d 100644 --- a/src/northbridge/via/vx900/vx900.h +++ b/src/northbridge/via/vx900/vx900.h @@ -28,7 +28,6 @@ #include <device/pci_ops.h> #include <device/pci.h> -#include <console/console.h> u32 vx900_get_tolm(void); void vx900_set_chrome9hd_fb_size(u32 size_mb); diff --git a/src/soc/intel/apollolake/memmap.c b/src/soc/intel/apollolake/memmap.c index ba1433c53b..4f91b8aea5 100644 --- a/src/soc/intel/apollolake/memmap.c +++ b/src/soc/intel/apollolake/memmap.c @@ -17,13 +17,15 @@ #include <assert.h> #include <cbmem.h> -#include "chip.h" +#include <console/console.h> #include <device/pci.h> #include <fsp/memmap.h> #include <intelblocks/smm.h> #include <soc/systemagent.h> #include <soc/pci_devs.h> +#include "chip.h" + void *cbmem_top(void) { const struct device *dev; diff --git a/src/soc/intel/fsp_baytrail/include/soc/i2c.h b/src/soc/intel/fsp_baytrail/include/soc/i2c.h index 7b3a3c8918..f0ae0b37ad 100644 --- a/src/soc/intel/fsp_baytrail/include/soc/i2c.h +++ b/src/soc/intel/fsp_baytrail/include/soc/i2c.h @@ -16,7 +16,6 @@ #ifndef __SOC_INTEL_FSP_BAYTRAIL_I2C_H__ #define __SOC_INTEL_FSP_BAYTRAIL_I2C_H__ -#include <console/console.h> #include <device/pci_def.h> #include <stdlib.h> diff --git a/src/soc/intel/icelake/bootblock/pch.c b/src/soc/intel/icelake/bootblock/pch.c index 2d35f5bf39..094079140d 100644 --- a/src/soc/intel/icelake/bootblock/pch.c +++ b/src/soc/intel/icelake/bootblock/pch.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <console/console.h> #include <device/mmio.h> #include <device/device.h> #include <device/pci_ops.h> diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c index 0e4388efd6..464c25e509 100644 --- a/src/soc/intel/icelake/chip.c +++ b/src/soc/intel/icelake/chip.c @@ -14,7 +14,6 @@ */ #include <chip.h> -#include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <fsp/api.h> diff --git a/src/soc/intel/icelake/lpc.c b/src/soc/intel/icelake/lpc.c index 8fe0507255..3d05824279 100644 --- a/src/soc/intel/icelake/lpc.c +++ b/src/soc/intel/icelake/lpc.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <pc80/isa-dma.h> diff --git a/src/soc/intel/icelake/systemagent.c b/src/soc/intel/icelake/systemagent.c index 7903667e9e..930e78ed5e 100644 --- a/src/soc/intel/icelake/systemagent.c +++ b/src/soc/intel/icelake/systemagent.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <intelblocks/systemagent.h> diff --git a/src/soc/mediatek/mt8183/auxadc.c b/src/soc/mediatek/mt8183/auxadc.c index caf9a0346a..a167d2b58e 100644 --- a/src/soc/mediatek/mt8183/auxadc.c +++ b/src/soc/mediatek/mt8183/auxadc.c @@ -15,7 +15,6 @@ #include <device/mmio.h> #include <assert.h> -#include <console/console.h> #include <delay.h> #include <soc/addressmap.h> #include <soc/auxadc.h> diff --git a/src/soc/qualcomm/ipq806x/uart.c b/src/soc/qualcomm/ipq806x/uart.c index fe2d673d47..66c31034fa 100644 --- a/src/soc/qualcomm/ipq806x/uart.c +++ b/src/soc/qualcomm/ipq806x/uart.c @@ -33,7 +33,6 @@ #include <device/mmio.h> #include <boot/coreboot_tables.h> -#include <console/console.h> #include <console/uart.h> #include <delay.h> #include <gpio.h> diff --git a/src/soc/qualcomm/qcs405/clock.c b/src/soc/qualcomm/qcs405/clock.c index cd7c1f2f41..369bcdf531 100644 --- a/src/soc/qualcomm/qcs405/clock.c +++ b/src/soc/qualcomm/qcs405/clock.c @@ -14,12 +14,10 @@ #include <device/mmio.h> #include <types.h> -#include <console/console.h> #include <delay.h> #include <timestamp.h> #include <commonlib/helpers.h> #include <string.h> - #include <soc/clock.h> #define DIV(div) (div ? (2*div - 1) : 0) diff --git a/src/soc/qualcomm/qcs405/gpio.c b/src/soc/qualcomm/qcs405/gpio.c index 5904cb3dc5..18aacf4ce4 100644 --- a/src/soc/qualcomm/qcs405/gpio.c +++ b/src/soc/qualcomm/qcs405/gpio.c @@ -15,10 +15,8 @@ #include <device/mmio.h> #include <types.h> -#include <console/console.h> #include <delay.h> #include <timestamp.h> - #include <gpio.h> void gpio_configure(gpio_t gpio, uint32_t func, uint32_t pull, diff --git a/src/soc/qualcomm/sdm845/clock.c b/src/soc/qualcomm/sdm845/clock.c index 382e5a691e..addac5ef40 100644 --- a/src/soc/qualcomm/sdm845/clock.c +++ b/src/soc/qualcomm/sdm845/clock.c @@ -15,7 +15,6 @@ #include <device/mmio.h> #include <types.h> -#include <console/console.h> #include <commonlib/helpers.h> #include <assert.h> #include <soc/clock.h> diff --git a/src/southbridge/amd/amd8111/early_smbus.c b/src/southbridge/amd/amd8111/early_smbus.c index 2e6781ae00..cabb31b52b 100644 --- a/src/southbridge/amd/amd8111/early_smbus.c +++ b/src/southbridge/amd/amd8111/early_smbus.c @@ -12,7 +12,9 @@ */ #include <arch/io.h> +#include <console/console.h> #include <device/pci_ops.h> + #include "amd8111_smbus.h" #define SMBUS_IO_BASE 0x0f00 diff --git a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h index 04b8abcc67..7ea2caa83b 100644 --- a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h +++ b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h @@ -53,7 +53,6 @@ typedef union _PCI_ADDR { #define IMC_ENABLE_OVER_WRITE 0x01 #endif -#include <console/console.h> #include "AmdSbLib.h" #include "Amd.h" #include <SB800.h> diff --git a/src/southbridge/amd/cimx/sb900/SbPlatform.h b/src/southbridge/amd/cimx/sb900/SbPlatform.h index 660553fbd8..f5c11d4ce0 100644 --- a/src/southbridge/amd/cimx/sb900/SbPlatform.h +++ b/src/southbridge/amd/cimx/sb900/SbPlatform.h @@ -49,7 +49,6 @@ typedef union _PCI_ADDR { #endif #define FIXUP_PTR(ptr) ptr -#include <console/console.h> #include "AmdSbLib.h" #include "Amd.h" #include "Hudson-2.h" diff --git a/src/southbridge/amd/sb800/early_setup.c b/src/southbridge/amd/sb800/early_setup.c index 6a575e316c..eaa47e3c2c 100644 --- a/src/southbridge/amd/sb800/early_setup.c +++ b/src/southbridge/amd/sb800/early_setup.c @@ -17,9 +17,11 @@ #define _SB800_EARLY_SETUP_C_ #include <arch/io.h> +#include <console/console.h> #include <reset.h> #include <southbridge/amd/common/amd_defs.h> #include <southbridge/amd/common/reset.h> + #include "sb800.h" #include "smbus.c" diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c index 1e357df85a..156c38745b 100644 --- a/src/southbridge/nvidia/ck804/early_setup_car.c +++ b/src/southbridge/nvidia/ck804/early_setup_car.c @@ -17,6 +17,7 @@ */ #include <arch/io.h> +#include <console/console.h> #include <reset.h> #include <southbridge/amd/common/reset.h> diff --git a/src/southbridge/nvidia/mcp55/early_setup_car.c b/src/southbridge/nvidia/mcp55/early_setup_car.c index 09414af3de..908cdd595f 100644 --- a/src/southbridge/nvidia/mcp55/early_setup_car.c +++ b/src/southbridge/nvidia/mcp55/early_setup_car.c @@ -17,6 +17,7 @@ #include <arch/io.h> #include <delay.h> +#include <console/console.h> #ifdef UNUSED_CODE int set_ht_link_buffer_counts_chain(u8 ht_c_num, unsigned vendorid, unsigned val); |