diff options
| -rw-r--r-- | src/mainboard/siemens/mc_apl1/mainboard.c | 56 |
1 files changed, 2 insertions, 54 deletions
diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c index 7c68090657..bff97ea8fe 100644 --- a/src/mainboard/siemens/mc_apl1/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/mainboard.c @@ -8,6 +8,7 @@ #include <hwilib.h> #include <i210.h> #include <intelblocks/cpulib.h> +#include <intelblocks/fast_spi.h> #include <intelblocks/systemagent.h> #include <soc/pci_devs.h> #include <string.h> @@ -23,51 +24,6 @@ #define BIOS_MAILBOX_INTERFACE 0x7084 #define RUN_BUSY_STS (1 << 31) -/* - * SPI Opcode Menu setup for SPIBAR lock down - * should support most common flash chips. - */ -#define SPI_OPMENU_0 0x01 /* WRSR: Write Status Register */ -#define SPI_OPTYPE_0 0x01 /* Write, no address */ - -#define SPI_OPMENU_1 0x02 /* PP: Page Program */ -#define SPI_OPTYPE_1 0x03 /* Write, address required */ - -#define SPI_OPMENU_2 0x03 /* READ: Read Data */ -#define SPI_OPTYPE_2 0x02 /* Read, address required */ - -#define SPI_OPMENU_3 0x05 /* RDSR: Read Status Register */ -#define SPI_OPTYPE_3 0x00 /* Read, no address */ - -#define SPI_OPMENU_4 0x20 /* SE20: Sector Erase 0x20 */ -#define SPI_OPTYPE_4 0x03 /* Write, address required */ - -#define SPI_OPMENU_5 0x9f /* RDID: Read ID */ -#define SPI_OPTYPE_5 0x00 /* Read, no address */ - -#define SPI_OPMENU_6 0xd8 /* BED8: Block Erase 0xd8 */ -#define SPI_OPTYPE_6 0x03 /* Write, address required */ - -#define SPI_OPMENU_7 0x0b /* FAST: Fast Read */ -#define SPI_OPTYPE_7 0x02 /* Read, address required */ - -#define SPI_OPMENU_UPPER ((SPI_OPMENU_7 << 24) | (SPI_OPMENU_6 << 16) | \ - (SPI_OPMENU_5 << 8) | SPI_OPMENU_4) -#define SPI_OPMENU_LOWER ((SPI_OPMENU_3 << 24) | (SPI_OPMENU_2 << 16) | \ - (SPI_OPMENU_1 << 8) | SPI_OPMENU_0) - -#define SPI_OPTYPE ((SPI_OPTYPE_7 << 14) | (SPI_OPTYPE_6 << 12) | \ - (SPI_OPTYPE_5 << 10) | (SPI_OPTYPE_4 << 8) | \ - (SPI_OPTYPE_3 << 6) | (SPI_OPTYPE_2 << 4) | \ - (SPI_OPTYPE_1 << 2) | (SPI_OPTYPE_0)) - -#define SPI_OPPREFIX ((0x50 << 8) | 0x06) /* EWSR and WREN */ - -#define SPIBAR_OFFSET 0x3800 -#define SPI_REG_PREOP_OPTYPE 0xa4 -#define SPI_REG_OPMENU_L 0xa8 -#define SPI_REG_OPMENU_H 0xac - #define SD_CAP_BYP 0x810 #define SD_CAP_BYP_EN 0x5A #define SD_CAP_BYP_REG1 0x814 @@ -233,7 +189,6 @@ static void mainboard_final(void *chip_info) { uint16_t cmd = 0; struct device *dev = NULL; - void *spi_base = NULL; /* Do board specific things */ variant_mainboard_final(); @@ -246,14 +201,7 @@ static void mainboard_final(void *chip_info) pci_write_config16(dev, PCI_COMMAND, cmd); } /* Set up SPI OPCODE menu before the controller is locked. */ - dev = PCH_DEV_SPI; - spi_base = (void *)pci_read_config32(dev, PCI_BASE_ADDRESS_0); - if (!spi_base) - return; - write32((spi_base + SPI_REG_PREOP_OPTYPE), - ((SPI_OPTYPE << 16) | SPI_OPPREFIX)); - write32((spi_base + SPI_REG_OPMENU_L), SPI_OPMENU_LOWER); - write32((spi_base + SPI_REG_OPMENU_H), SPI_OPMENU_UPPER); + fast_spi_set_opcode_menu(); /* Set SD-Card speed to HS mode only. */ dev = pcidev_path_on_root(PCH_DEVFN_SDCARD); |