diff options
| -rw-r--r-- | src/commonlib/include/commonlib/timestamp_serialized.h | 271 |
1 files changed, 139 insertions, 132 deletions
diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h index a51b68f0b6..890d9882f5 100644 --- a/src/commonlib/include/commonlib/timestamp_serialized.h +++ b/src/commonlib/include/commonlib/timestamp_serialized.h @@ -4,6 +4,7 @@ #define __TIMESTAMP_SERIALIZED_H__ #include <stdint.h> +#include <commonlib/bsd/helpers.h> struct timestamp_entry { uint32_t entry_id; @@ -165,152 +166,158 @@ enum timestamp_id { TS_KERNEL_DECOMPRESSION = 1102, }; +#define TS_NAME_DEF(id, desc) {(id), STRINGIFY(id), (desc)} + static const struct timestamp_id_to_name { uint32_t id; + const char *enum_name; const char *name; } timestamp_ids[] = { /* Marker to report base_time. */ - { 0, "1st timestamp" }, - { TS_ROMSTAGE_START, "start of romstage" }, - { TS_INITRAM_START, "before RAM initialization" }, - { TS_INITRAM_END, "after RAM initialization" }, - { TS_ROMSTAGE_END, "end of romstage" }, - { TS_VBOOT_START, "start of verified boot" }, - { TS_VBOOT_END, "end of verified boot" }, - { TS_COPYRAM_START, "starting to load ramstage" }, - { TS_COPYRAM_END, "finished loading ramstage" }, - { TS_RAMSTAGE_START, "start of ramstage" }, - { TS_BOOTBLOCK_START, "start of bootblock" }, - { TS_BOOTBLOCK_END, "end of bootblock" }, - { TS_COPYROM_START, "starting to load romstage" }, - { TS_COPYROM_END, "finished loading romstage" }, - { TS_ULZMA_START, "starting LZMA decompress (ignore for x86)" }, - { TS_ULZMA_END, "finished LZMA decompress (ignore for x86)" }, - { TS_ULZ4F_START, "starting LZ4 decompress (ignore for x86)" }, - { TS_ULZ4F_END, "finished LZ4 decompress (ignore for x86)" }, - { TS_DEVICE_ENUMERATE, "device enumeration" }, - { TS_DEVICE_CONFIGURE, "device configuration" }, - { TS_DEVICE_ENABLE, "device enable" }, - { TS_DEVICE_INITIALIZE, "device initialization" }, - { TS_OPROM_INITIALIZE, "Option ROM initialization" }, - { TS_OPROM_COPY_END, "Option ROM copy done" }, - { TS_OPROM_END, "Option ROM run done" }, - { TS_DEVICE_DONE, "device setup done" }, - { TS_CBMEM_POST, "cbmem post" }, - { TS_WRITE_TABLES, "write tables" }, - { TS_FINALIZE_CHIPS, "finalize chips" }, - { TS_LOAD_PAYLOAD, "starting to load payload" }, - { TS_ACPI_WAKE_JUMP, "ACPI wake jump" }, - { TS_SELFBOOT_JUMP, "selfboot jump" }, - { TS_DELAY_START, "Forced delay start" }, - { TS_DELAY_END, "Forced delay end" }, - { TS_READ_UCODE_START, "started reading uCode" }, - { TS_READ_UCODE_END, "finished reading uCode" }, - { TS_ELOG_INIT_START, "started elog init" }, - { TS_ELOG_INIT_END, "finished elog init" }, - - { TS_COPYVER_START, "starting to load verstage" }, - { TS_COPYVER_END, "finished loading verstage" }, - { TS_TPMINIT_START, "starting to initialize TPM" }, - { TS_TPMINIT_END, "finished TPM initialization" }, - { TS_VERIFY_SLOT_START, "starting to verify keyblock/preamble (RSA)" }, - { TS_VERIFY_SLOT_END, "finished verifying keyblock/preamble (RSA)" }, - { TS_HASH_BODY_START, "starting to verify body (load+SHA2+RSA) " }, - { TS_LOADING_END, "finished loading body" }, - { TS_HASHING_END, "finished calculating body hash (SHA2)" }, - { TS_HASH_BODY_END, "finished verifying body signature (RSA)" }, - { TS_TPMPCR_START, "starting TPM PCR extend" }, - { TS_TPMPCR_END, "finished TPM PCR extend" }, - { TS_TPMLOCK_START, "starting locking TPM" }, - { TS_TPMLOCK_END, "finished locking TPM" }, - { TS_TPM_ENABLE_UPDATE_START, "started TPM enable update" }, - { TS_TPM_ENABLE_UPDATE_END, "finished TPM enable update" }, - - { TS_COPYVPD_START, "starting to load Chrome OS VPD" }, - { TS_COPYVPD_RO_END, "finished loading Chrome OS VPD (RO)" }, - { TS_COPYVPD_RW_END, "finished loading Chrome OS VPD (RW)" }, - - { TS_EC_SYNC_START, "starting EC software sync" }, - { TS_EC_HASH_READY, "EC vboot hash ready" }, - { TS_EC_POWER_LIMIT_WAIT, "waiting for EC to allow higher power draw" }, - { TS_EC_SYNC_END, "finished EC software sync" }, + {0, "TS_START", "1st timestamp"}, + TS_NAME_DEF(TS_ROMSTAGE_START, "start of romstage"), + TS_NAME_DEF(TS_INITRAM_START, "before RAM initialization"), + TS_NAME_DEF(TS_INITRAM_END, "after RAM initialization"), + TS_NAME_DEF(TS_ROMSTAGE_END, "end of romstage"), + TS_NAME_DEF(TS_VBOOT_START, "start of verified boot"), + TS_NAME_DEF(TS_VBOOT_END, "end of verified boot"), + TS_NAME_DEF(TS_COPYRAM_START, "starting to load ramstage"), + TS_NAME_DEF(TS_COPYRAM_END, "finished loading ramstage"), + TS_NAME_DEF(TS_RAMSTAGE_START, "start of ramstage"), + TS_NAME_DEF(TS_BOOTBLOCK_START, "start of bootblock"), + TS_NAME_DEF(TS_BOOTBLOCK_END, "end of bootblock"), + TS_NAME_DEF(TS_COPYROM_START, "starting to load romstage"), + TS_NAME_DEF(TS_COPYROM_END, "finished loading romstage"), + TS_NAME_DEF(TS_ULZMA_START, "starting LZMA decompress (ignore for x86)"), + TS_NAME_DEF(TS_ULZMA_END, "finished LZMA decompress (ignore for x86)"), + TS_NAME_DEF(TS_ULZ4F_START, "starting LZ4 decompress (ignore for x86)"), + TS_NAME_DEF(TS_ULZ4F_END, "finished LZ4 decompress (ignore for x86)"), + TS_NAME_DEF(TS_DEVICE_ENUMERATE, "device enumeration"), + TS_NAME_DEF(TS_DEVICE_CONFIGURE, "device configuration"), + TS_NAME_DEF(TS_DEVICE_ENABLE, "device enable"), + TS_NAME_DEF(TS_DEVICE_INITIALIZE, "device initialization"), + TS_NAME_DEF(TS_OPROM_INITIALIZE, "Option ROM initialization"), + TS_NAME_DEF(TS_OPROM_COPY_END, "Option ROM copy done"), + TS_NAME_DEF(TS_OPROM_END, "Option ROM run done"), + TS_NAME_DEF(TS_DEVICE_DONE, "device setup done"), + TS_NAME_DEF(TS_CBMEM_POST, "cbmem post"), + TS_NAME_DEF(TS_WRITE_TABLES, "write tables"), + TS_NAME_DEF(TS_FINALIZE_CHIPS, "finalize chips"), + TS_NAME_DEF(TS_LOAD_PAYLOAD, "starting to load payload"), + TS_NAME_DEF(TS_ACPI_WAKE_JUMP, "ACPI wake jump"), + TS_NAME_DEF(TS_SELFBOOT_JUMP, "selfboot jump"), + TS_NAME_DEF(TS_POSTCAR_START, "start of postcar"), + TS_NAME_DEF(TS_POSTCAR_END, "end of postcar"), + TS_NAME_DEF(TS_DELAY_START, "Forced delay start"), + TS_NAME_DEF(TS_DELAY_END, "Forced delay end"), + TS_NAME_DEF(TS_READ_UCODE_START, "started reading uCode"), + TS_NAME_DEF(TS_READ_UCODE_END, "finished reading uCode"), + TS_NAME_DEF(TS_ELOG_INIT_START, "started elog init"), + TS_NAME_DEF(TS_ELOG_INIT_END, "finished elog init"), - { TS_DC_START, "depthcharge start" }, - { TS_RO_PARAMS_INIT, "RO parameter init" }, - { TS_RO_VB_INIT, "RO vboot init" }, - { TS_RO_VB_SELECT_FIRMWARE, "RO vboot select firmware" }, - { TS_RO_VB_SELECT_AND_LOAD_KERNEL, "RO vboot select&load kernel" }, - { TS_RW_VB_SELECT_AND_LOAD_KERNEL, "RW vboot select&load kernel" }, - { TS_VB_SELECT_AND_LOAD_KERNEL, "vboot select&load kernel" }, - { TS_VB_EC_VBOOT_DONE, "finished EC verification" }, - { TS_VB_STORAGE_INIT_DONE, "finished storage device initialization" }, - { TS_VB_READ_KERNEL_DONE, "finished reading kernel from disk" }, - { TS_VB_VBOOT_DONE, "finished vboot kernel verification" }, - { TS_KERNEL_DECOMPRESSION, "starting kernel decompression/relocation" }, - { TS_KERNEL_START, "jumping to kernel" }, + /* Google related timestamps */ + TS_NAME_DEF(TS_COPYVER_START, "starting to load verstage"), + TS_NAME_DEF(TS_COPYVER_END, "finished loading verstage"), + TS_NAME_DEF(TS_TPMINIT_START, "starting to initialize TPM"), + TS_NAME_DEF(TS_TPMINIT_END, "finished TPM initialization"), + TS_NAME_DEF(TS_VERIFY_SLOT_START, "starting to verify keyblock/preamble (RSA)"), + TS_NAME_DEF(TS_VERIFY_SLOT_END, "finished verifying keyblock/preamble (RSA)"), + TS_NAME_DEF(TS_HASH_BODY_START, "starting to verify body (load+SHA2+RSA) "), + TS_NAME_DEF(TS_LOADING_END, "finished loading body"), + TS_NAME_DEF(TS_HASHING_END, "finished calculating body hash (SHA2)"), + TS_NAME_DEF(TS_HASH_BODY_END, "finished verifying body signature (RSA)"), + TS_NAME_DEF(TS_TPMPCR_START, "starting TPM PCR extend"), + TS_NAME_DEF(TS_TPMPCR_END, "finished TPM PCR extend"), + TS_NAME_DEF(TS_TPMLOCK_START, "starting locking TPM"), + TS_NAME_DEF(TS_TPMLOCK_END, "finished locking TPM"), + TS_NAME_DEF(TS_EC_SYNC_START, "starting EC software sync"), + TS_NAME_DEF(TS_EC_HASH_READY, "EC vboot hash ready"), + TS_NAME_DEF(TS_EC_POWER_LIMIT_WAIT, "waiting for EC to allow higher power draw"), + TS_NAME_DEF(TS_EC_SYNC_END, "finished EC software sync"), + TS_NAME_DEF(TS_COPYVPD_START, "starting to load Chrome OS VPD"), + TS_NAME_DEF(TS_COPYVPD_RO_END, "finished loading Chrome OS VPD (RO)"), + TS_NAME_DEF(TS_COPYVPD_RW_END, "finished loading Chrome OS VPD (RW)"), + TS_NAME_DEF(TS_TPM_ENABLE_UPDATE_START, "started TPM enable update"), + TS_NAME_DEF(TS_TPM_ENABLE_UPDATE_END, "finished TPM enable update"), /* AMD related timestamps */ - { TS_AGESA_INIT_RESET_START, "calling AmdInitReset" }, - { TS_AGESA_INIT_RESET_END, "back from AmdInitReset" }, - { TS_AGESA_INIT_EARLY_START, "calling AmdInitEarly" }, - { TS_AGESA_INIT_EARLY_END, "back from AmdInitEarly" }, - { TS_AGESA_INIT_POST_START, "calling AmdInitPost" }, - { TS_AGESA_INIT_POST_END, "back from AmdInitPost" }, - { TS_AGESA_INIT_ENV_START, "calling AmdInitEnv" }, - { TS_AGESA_INIT_ENV_END, "back from AmdInitEnv" }, - { TS_AGESA_INIT_MID_START, "calling AmdInitMid" }, - { TS_AGESA_INIT_MID_END, "back from AmdInitMid" }, - { TS_AGESA_INIT_LATE_START, "calling AmdInitLate" }, - { TS_AGESA_INIT_LATE_END, "back from AmdInitLate" }, - { TS_AGESA_INIT_RTB_START, "calling AmdInitRtb/AmdS3Save" }, - { TS_AGESA_INIT_RTB_END, "back from AmdInitRtb/AmdS3Save" }, - { TS_AGESA_INIT_RESUME_START, "calling AmdInitResume" }, - { TS_AGESA_INIT_RESUME_END, "back from AmdInitResume" }, - { TS_AGESA_S3_LATE_START, "calling AmdS3LateRestore" }, - { TS_AGESA_S3_LATE_END, "back from AmdS3LateRestore" }, - { TS_AGESA_S3_FINAL_START, "calling AmdS3FinalRestore" }, - { TS_AGESA_S3_FINAL_END, "back from AmdS3FinalRestore" }, - { TS_AMD_APOB_READ_START, "starting APOB read" }, - { TS_AMD_APOB_ERASE_START, "starting APOB erase" }, - { TS_AMD_APOB_WRITE_START, "starting APOB write" }, - { TS_AMD_APOB_END, "finished APOB" }, + TS_NAME_DEF(TS_AGESA_INIT_RESET_START, "calling AmdInitReset"), + TS_NAME_DEF(TS_AGESA_INIT_RESET_END, "back from AmdInitReset"), + TS_NAME_DEF(TS_AGESA_INIT_EARLY_START, "calling AmdInitEarly"), + TS_NAME_DEF(TS_AGESA_INIT_EARLY_END, "back from AmdInitEarly"), + TS_NAME_DEF(TS_AGESA_INIT_POST_START, "calling AmdInitPost"), + TS_NAME_DEF(TS_AGESA_INIT_POST_END, "back from AmdInitPost"), + TS_NAME_DEF(TS_AGESA_INIT_ENV_START, "calling AmdInitEnv"), + TS_NAME_DEF(TS_AGESA_INIT_ENV_END, "back from AmdInitEnv"), + TS_NAME_DEF(TS_AGESA_INIT_MID_START, "calling AmdInitMid"), + TS_NAME_DEF(TS_AGESA_INIT_MID_END, "back from AmdInitMid"), + TS_NAME_DEF(TS_AGESA_INIT_LATE_START, "calling AmdInitLate"), + TS_NAME_DEF(TS_AGESA_INIT_LATE_END, "back from AmdInitLate"), + TS_NAME_DEF(TS_AGESA_INIT_RTB_START, "calling AmdInitRtb/AmdS3Save"), + TS_NAME_DEF(TS_AGESA_INIT_RTB_END, "back from AmdInitRtb/AmdS3Save"), + TS_NAME_DEF(TS_AGESA_INIT_RESUME_START, "calling AmdInitResume"), + TS_NAME_DEF(TS_AGESA_INIT_RESUME_END, "back from AmdInitResume"), + TS_NAME_DEF(TS_AGESA_S3_LATE_START, "calling AmdS3LateRestore"), + TS_NAME_DEF(TS_AGESA_S3_LATE_END, "back from AmdS3LateRestore"), + TS_NAME_DEF(TS_AGESA_S3_FINAL_START, "calling AmdS3FinalRestore"), + TS_NAME_DEF(TS_AGESA_S3_FINAL_END, "back from AmdS3FinalRestore"), + TS_NAME_DEF(TS_AMD_APOB_READ_START, "starting APOB read"), + TS_NAME_DEF(TS_AMD_APOB_ERASE_START, "starting APOB erase"), + TS_NAME_DEF(TS_AMD_APOB_WRITE_START, "starting APOB write"), + TS_NAME_DEF(TS_AMD_APOB_END, "finished APOB"), /* Intel ME related timestamps */ - { TS_ME_INFORM_DRAM_START, "waiting for ME acknowledgement of raminit"}, - { TS_ME_INFORM_DRAM_END, "finished waiting for ME response"}, - { TS_ME_END_OF_POST_START, "before sending EOP to ME"}, - { TS_ME_END_OF_POST_END, "after sending EOP to ME"}, - { TS_ME_BOOT_STALL_END, "CSE sent 'Boot Stall Done' to PMC"}, - { TS_ME_ICC_CONFIG_START, "CSE started to handle ICC configuration"}, - { TS_ME_HOST_BOOT_PREP_END, "CSE sent 'Host BIOS Prep Done' to PMC"}, - { TS_ME_RECEIVED_CRDA_FROM_PMC, "CSE received 'CPU Reset Done Ack sent' from PMC"}, - { TS_CSE_FW_SYNC_START, "starting CSE firmware sync"}, - { TS_CSE_FW_SYNC_END, "finished CSE firmware sync"}, - { TS_ME_ROM_START, "CSME ROM started execution"}, + TS_NAME_DEF(TS_ME_INFORM_DRAM_START, "waiting for ME acknowledgement of raminit"), + TS_NAME_DEF(TS_ME_INFORM_DRAM_END, "finished waiting for ME response"), + TS_NAME_DEF(TS_ME_END_OF_POST_START, "before sending EOP to ME"), + TS_NAME_DEF(TS_ME_END_OF_POST_END, "after sending EOP to ME"), + TS_NAME_DEF(TS_ME_BOOT_STALL_END, "CSE sent 'Boot Stall Done' to PMC"), + TS_NAME_DEF(TS_ME_ICC_CONFIG_START, "CSE started to handle ICC configuration"), + TS_NAME_DEF(TS_ME_HOST_BOOT_PREP_END, "CSE sent 'Host BIOS Prep Done' to PMC"), + TS_NAME_DEF(TS_ME_RECEIVED_CRDA_FROM_PMC, + "CSE received 'CPU Reset Done Ack sent' from PMC"), + TS_NAME_DEF(TS_CSE_FW_SYNC_START, "starting CSE firmware sync"), + TS_NAME_DEF(TS_CSE_FW_SYNC_END, "finished CSE firmware sync"), /* FSP related timestamps */ - { TS_FSP_MEMORY_INIT_START, "calling FspMemoryInit" }, - { TS_FSP_MEMORY_INIT_END, "returning from FspMemoryInit" }, - { TS_FSP_TEMP_RAM_EXIT_START, "calling FspTempRamExit" }, - { TS_FSP_TEMP_RAM_EXIT_END, "returning from FspTempRamExit" }, - { TS_FSP_SILICON_INIT_START, "calling FspSiliconInit" }, - { TS_FSP_SILICON_INIT_END, "returning from FspSiliconInit" }, - { TS_FSP_MULTI_PHASE_SI_INIT_START, "calling FspMultiPhaseSiInit" }, - { TS_FSP_MULTI_PHASE_SI_INIT_END, "returning from FspMultiPhaseSiInit" }, - { TS_FSP_ENUMERATE_START, "calling FspNotify(AfterPciEnumeration)" }, - { TS_FSP_ENUMERATE_END, - "returning from FspNotify(AfterPciEnumeration)" }, - { TS_FSP_FINALIZE_START, "calling FspNotify(ReadyToBoot)" }, - { TS_FSP_FINALIZE_END, "returning from FspNotify(ReadyToBoot)" }, - { TS_FSP_END_OF_FIRMWARE_START, "calling FspNotify(EndOfFirmware)" }, - { TS_FSP_END_OF_FIRMWARE_END, - "returning from FspNotify(EndOfFirmware)" }, + TS_NAME_DEF(TS_FSP_MEMORY_INIT_START, "calling FspMemoryInit"), + TS_NAME_DEF(TS_FSP_MEMORY_INIT_END, "returning from FspMemoryInit"), + TS_NAME_DEF(TS_FSP_TEMP_RAM_EXIT_START, "calling FspTempRamExit"), + TS_NAME_DEF(TS_FSP_TEMP_RAM_EXIT_END, "returning from FspTempRamExit"), + TS_NAME_DEF(TS_FSP_SILICON_INIT_START, "calling FspSiliconInit"), + TS_NAME_DEF(TS_FSP_SILICON_INIT_END, "returning from FspSiliconInit"), + TS_NAME_DEF(TS_FSP_MULTI_PHASE_SI_INIT_START, "calling FspMultiPhaseSiInit"), + TS_NAME_DEF(TS_FSP_MULTI_PHASE_SI_INIT_END, "returning from FspMultiPhaseSiInit"), + TS_NAME_DEF(TS_FSP_ENUMERATE_START, "calling FspNotify(AfterPciEnumeration)"), + TS_NAME_DEF(TS_FSP_ENUMERATE_END, "returning from FspNotify(AfterPciEnumeration)"), + TS_NAME_DEF(TS_FSP_FINALIZE_START, "calling FspNotify(ReadyToBoot)"), + TS_NAME_DEF(TS_FSP_FINALIZE_END, "returning from FspNotify(ReadyToBoot)"), + TS_NAME_DEF(TS_FSP_END_OF_FIRMWARE_START, "calling FspNotify(EndOfFirmware)"), + TS_NAME_DEF(TS_FSP_END_OF_FIRMWARE_END, "returning from FspNotify(EndOfFirmware)"), + TS_NAME_DEF(TS_FSP_MEMORY_INIT_LOAD, "loading FSP-M"), + TS_NAME_DEF(TS_FSP_SILICON_INIT_LOAD, "loading FSP-S"), + + /* Intel ME continued */ + TS_NAME_DEF(TS_ME_ROM_START, "CSME ROM started execution"), + + /* Depthcharge entry timestamp */ + TS_NAME_DEF(TS_DC_START, "depthcharge start"), + + TS_NAME_DEF(TS_RO_PARAMS_INIT, "RO parameter init"), + TS_NAME_DEF(TS_RO_VB_INIT, "RO vboot init"), + TS_NAME_DEF(TS_RO_VB_SELECT_FIRMWARE, "RO vboot select firmware"), + TS_NAME_DEF(TS_RO_VB_SELECT_AND_LOAD_KERNEL, "RO vboot select&load kernel"), + + TS_NAME_DEF(TS_RW_VB_SELECT_AND_LOAD_KERNEL, "RW vboot select&load kernel"), - { TS_FSP_MEMORY_INIT_LOAD, "loading FSP-M" }, - { TS_FSP_SILICON_INIT_LOAD, "loading FSP-S" }, + TS_NAME_DEF(TS_VB_SELECT_AND_LOAD_KERNEL, "vboot select&load kernel"), + TS_NAME_DEF(TS_VB_EC_VBOOT_DONE, "finished EC verification"), + TS_NAME_DEF(TS_VB_STORAGE_INIT_DONE, "finished storage device initialization"), + TS_NAME_DEF(TS_VB_READ_KERNEL_DONE, "finished reading kernel from disk"), + TS_NAME_DEF(TS_VB_VBOOT_DONE, "finished vboot kernel verification"), - { TS_POSTCAR_START, "start of postcar" }, - { TS_POSTCAR_END, "end of postcar" }, + TS_NAME_DEF(TS_KERNEL_START, "jumping to kernel"), + TS_NAME_DEF(TS_KERNEL_DECOMPRESSION, "starting kernel decompression/relocation"), }; #endif |