diff options
| -rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/cpu.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/finalize.c | 60 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/model_15_init.c | 5 |
4 files changed, 62 insertions, 6 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 9f99c3c58d..59405de47d 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -106,6 +106,7 @@ ramstage-$(CONFIG_STONEYRIDGE_UART) += uart.c ramstage-y += usb.c ramstage-y += tsc_freq.c ramstage-$(CONFIG_SPI_FLASH) += spi.c +ramstage-y += finalize.c smm-y += monotonic_timer.c smm-y += smihandler.c diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c index 86429e207e..5042cbcd5e 100644 --- a/src/soc/amd/stoneyridge/cpu.c +++ b/src/soc/amd/stoneyridge/cpu.c @@ -76,7 +76,7 @@ static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize, relo_attrs.smbase = (uint32_t)smm_base; relo_attrs.tseg_base = relo_attrs.smbase; relo_attrs.tseg_mask = ALIGN_DOWN(~(smm_size - 1), 128 * KiB); - relo_attrs.tseg_mask |= SMM_TSEG_WB | SMM_TSEG_VALID; + relo_attrs.tseg_mask |= SMM_TSEG_WB; *perm_smbase = (uintptr_t)handler_base; *perm_smsize = handler_size; diff --git a/src/soc/amd/stoneyridge/finalize.c b/src/soc/amd/stoneyridge/finalize.c new file mode 100644 index 0000000000..67f9e67df4 --- /dev/null +++ b/src/soc/amd/stoneyridge/finalize.c @@ -0,0 +1,60 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <cpu/x86/mp.h> +#include <cpu/x86/msr.h> +#include <cpu/amd/amdfam15.h> +#include <bootstate.h> +#include <timer.h> +#include <console/console.h> + +static void per_core_finalize(void) +{ + msr_t hwcr, mask; + + /* Finalize SMM settings */ + hwcr = rdmsr(HWCR_MSR); + if (hwcr.lo & SMM_LOCK) /* Skip if already locked, avoid GPF */ + return; + + if (IS_ENABLED(CONFIG_SMM_TSEG)) { + mask = rdmsr(MSR_SMM_MASK); + mask.lo |= SMM_TSEG_VALID; + wrmsr(MSR_SMM_MASK, mask); + } + + hwcr.lo |= SMM_LOCK; + wrmsr(HWCR_MSR, hwcr); +} + +static void finalize_cores(void) +{ + int r; + printk(BIOS_SPEW, "Lock SMM configuration\n"); + + r = mp_run_on_all_cpus(per_core_finalize, 10 * USECS_PER_MSEC); + if (r) + printk(BIOS_WARNING, "Failed to finalize all cores\n"); +} + +static void soc_finalize(void *unused) +{ + finalize_cores(); + + post_code(POST_OS_BOOT); +} + +BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, soc_finalize, NULL); +BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, soc_finalize, NULL); diff --git a/src/soc/amd/stoneyridge/model_15_init.c b/src/soc/amd/stoneyridge/model_15_init.c index 930e395507..56f747cc6b 100644 --- a/src/soc/amd/stoneyridge/model_15_init.c +++ b/src/soc/amd/stoneyridge/model_15_init.c @@ -76,11 +76,6 @@ static void model_15_init(device_t dev) msr.hi = 0; for (i = 0 ; i < 6 ; i++) wrmsr(MCI_STATUS + (i * 4), msr); - - /* Write protect SMM space with SMMLOCK. */ - msr = rdmsr(HWCR_MSR); - msr.lo |= (1 << 0); - wrmsr(HWCR_MSR, msr); } static struct device_operations cpu_dev_ops = { |