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-rw-r--r--src/cpu/amd/agesa/family14/model_14_init.c5
-rw-r--r--src/cpu/amd/agesa/family15tn/model_15_init.c5
-rw-r--r--src/cpu/amd/agesa/family16kb/model_16_init.c5
-rw-r--r--src/cpu/amd/pi/00730F01/model_16_init.c5
4 files changed, 8 insertions, 12 deletions
diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c
index 942539cac2..1bcbc34904 100644
--- a/src/cpu/amd/agesa/family14/model_14_init.c
+++ b/src/cpu/amd/agesa/family14/model_14_init.c
@@ -17,7 +17,7 @@ static void model_14_init(struct device *dev)
{
u8 i;
msr_t msr;
- int num_banks;
+ unsigned int num_banks;
int msrno;
#if CONFIG(LOGICAL_CPUS)
u32 siblings;
@@ -59,8 +59,7 @@ static void model_14_init(struct device *dev)
x86_enable_cache();
/* zero the machine check error status registers */
- msr = rdmsr(IA32_MCG_CAP);
- num_banks = msr.lo & MCA_BANKS_MASK;
+ num_banks = mca_get_bank_count();
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < num_banks; i++)
diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c
index 83efb44693..c7fcb36c20 100644
--- a/src/cpu/amd/agesa/family15tn/model_15_init.c
+++ b/src/cpu/amd/agesa/family15tn/model_15_init.c
@@ -20,7 +20,7 @@ static void model_15_init(struct device *dev)
u8 i;
msr_t msr;
- int num_banks;
+ unsigned int num_banks;
int msrno;
unsigned int cpu_idx;
#if CONFIG(LOGICAL_CPUS)
@@ -58,8 +58,7 @@ static void model_15_init(struct device *dev)
x86_enable_cache();
/* zero the machine check error status registers */
- msr = rdmsr(IA32_MCG_CAP);
- num_banks = msr.lo & MCA_BANKS_MASK;
+ num_banks = mca_get_bank_count();
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < num_banks; i++)
diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c
index c1c75775e0..28c3e78900 100644
--- a/src/cpu/amd/agesa/family16kb/model_16_init.c
+++ b/src/cpu/amd/agesa/family16kb/model_16_init.c
@@ -19,7 +19,7 @@ static void model_16_init(struct device *dev)
u8 i;
msr_t msr;
- int num_banks;
+ unsigned int num_banks;
int msrno;
#if CONFIG(LOGICAL_CPUS)
u32 siblings;
@@ -56,8 +56,7 @@ static void model_16_init(struct device *dev)
x86_enable_cache();
/* zero the machine check error status registers */
- msr = rdmsr(IA32_MCG_CAP);
- num_banks = msr.lo & MCA_BANKS_MASK;
+ num_banks = mca_get_bank_count();
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < num_banks; i++)
diff --git a/src/cpu/amd/pi/00730F01/model_16_init.c b/src/cpu/amd/pi/00730F01/model_16_init.c
index 358f83b775..7266a2cc61 100644
--- a/src/cpu/amd/pi/00730F01/model_16_init.c
+++ b/src/cpu/amd/pi/00730F01/model_16_init.c
@@ -22,7 +22,7 @@ static void model_16_init(struct device *dev)
u8 i;
msr_t msr;
- int num_banks;
+ unsigned int num_banks;
u32 siblings;
/*
@@ -41,8 +41,7 @@ static void model_16_init(struct device *dev)
x86_mtrr_check();
/* zero the machine check error status registers */
- msr = rdmsr(IA32_MCG_CAP);
- num_banks = msr.lo & MCA_BANKS_MASK;
+ num_banks = mca_get_bank_count();
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < num_banks; i++)