diff options
| -rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/fch_agesa.c | 60 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 56 |
3 files changed, 62 insertions, 57 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 4a0eafd267..08cdf8a597 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -19,13 +19,13 @@ romstage-y += BiosCallOuts.c romstage-y += i2c.c romstage-y += romstage.c romstage-y += enable_usbdebug.c +romstage-y += fch_agesa.c romstage-y += gpio.c romstage-y += monotonic_timer.c romstage-y += smbus_spd.c romstage-y += memmap.c romstage-y += uart.c romstage-y += tsc_freq.c -romstage-y += southbridge.c romstage-y += psp.c verstage-y += gpio.c @@ -47,6 +47,7 @@ ramstage-y += cpu.c ramstage-y += mca.c ramstage-y += enable_usbdebug.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c +ramstage-y += fch_agesa.c ramstage-y += gpio.c ramstage-y += monotonic_timer.c ramstage-y += southbridge.c diff --git a/src/soc/amd/stoneyridge/fch_agesa.c b/src/soc/amd/stoneyridge/fch_agesa.c new file mode 100644 index 0000000000..ee6ab91c6d --- /dev/null +++ b/src/soc/amd/stoneyridge/fch_agesa.c @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <amdblocks/agesawrapper.h> +#include <device/device.h> +#include <soc/pci_devs.h> + +static int is_sata_config(void) +{ + return !((SataNativeIde == CONFIG_STONEYRIDGE_SATA_MODE) + || (SataLegacyIde == CONFIG_STONEYRIDGE_SATA_MODE)); +} + +static inline int sb_sata_enable(void) +{ + /* True if IDE or AHCI. */ + return (SataNativeIde == CONFIG_STONEYRIDGE_SATA_MODE) || + (SataAhci == CONFIG_STONEYRIDGE_SATA_MODE); +} + +static inline int sb_ide_enable(void) +{ + /* True if IDE or LEGACY IDE. */ + return (SataNativeIde == CONFIG_STONEYRIDGE_SATA_MODE) || + (SataLegacyIde == CONFIG_STONEYRIDGE_SATA_MODE); +} + +void SetFchResetParams(FCH_RESET_INTERFACE *params) +{ + const struct device *dev = pcidev_path_on_root(SATA_DEVFN); + params->Xhci0Enable = CONFIG(STONEYRIDGE_XHCI_ENABLE); + if (dev && dev->enabled) { + params->SataEnable = sb_sata_enable(); + params->IdeEnable = sb_ide_enable(); + } else { + params->SataEnable = FALSE; + params->IdeEnable = FALSE; + } +} + +void SetFchEnvParams(FCH_INTERFACE *params) +{ + const struct device *dev = pcidev_path_on_root(SATA_DEVFN); + params->AzaliaController = AzEnable; + params->SataClass = CONFIG_STONEYRIDGE_SATA_MODE; + if (dev && dev->enabled) { + params->SataEnable = is_sata_config(); + params->IdeEnable = !params->SataEnable; + params->SataIdeMode = (CONFIG_STONEYRIDGE_SATA_MODE == + SataLegacyIde); + } else { + params->SataEnable = FALSE; + params->IdeEnable = FALSE; + params->SataIdeMode = FALSE; + } +} + +void SetFchMidParams(FCH_INTERFACE *params) +{ + SetFchEnvParams(params); +} diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index a5cbb10a63..f0442e52c1 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -11,7 +11,6 @@ #include <cbmem.h> #include <acpi/acpi_gnvs.h> #include <amdblocks/amd_pci_util.h> -#include <amdblocks/agesawrapper.h> #include <amdblocks/aoac.h> #include <amdblocks/reset.h> #include <amdblocks/acpimmio.h> @@ -31,61 +30,6 @@ #include <soc/nvs.h> #include <types.h> -static int is_sata_config(void) -{ - return !((SataNativeIde == CONFIG_STONEYRIDGE_SATA_MODE) - || (SataLegacyIde == CONFIG_STONEYRIDGE_SATA_MODE)); -} - -static inline int sb_sata_enable(void) -{ - /* True if IDE or AHCI. */ - return (SataNativeIde == CONFIG_STONEYRIDGE_SATA_MODE) || - (SataAhci == CONFIG_STONEYRIDGE_SATA_MODE); -} - -static inline int sb_ide_enable(void) -{ - /* True if IDE or LEGACY IDE. */ - return (SataNativeIde == CONFIG_STONEYRIDGE_SATA_MODE) || - (SataLegacyIde == CONFIG_STONEYRIDGE_SATA_MODE); -} - -void SetFchResetParams(FCH_RESET_INTERFACE *params) -{ - const struct device *dev = pcidev_path_on_root(SATA_DEVFN); - params->Xhci0Enable = CONFIG(STONEYRIDGE_XHCI_ENABLE); - if (dev && dev->enabled) { - params->SataEnable = sb_sata_enable(); - params->IdeEnable = sb_ide_enable(); - } else { - params->SataEnable = FALSE; - params->IdeEnable = FALSE; - } -} - -void SetFchEnvParams(FCH_INTERFACE *params) -{ - const struct device *dev = pcidev_path_on_root(SATA_DEVFN); - params->AzaliaController = AzEnable; - params->SataClass = CONFIG_STONEYRIDGE_SATA_MODE; - if (dev && dev->enabled) { - params->SataEnable = is_sata_config(); - params->IdeEnable = !params->SataEnable; - params->SataIdeMode = (CONFIG_STONEYRIDGE_SATA_MODE == - SataLegacyIde); - } else { - params->SataEnable = FALSE; - params->IdeEnable = FALSE; - params->SataIdeMode = FALSE; - } -} - -void SetFchMidParams(FCH_INTERFACE *params) -{ - SetFchEnvParams(params); -} - /* * Table of APIC register index and associated IRQ name. Using IDX_XXX_NAME * provides a visible association with the index, therefore helping |