diff options
-rw-r--r-- | src/mainboard/intel/adlrvp/devicetree.cb | 4 | ||||
-rw-r--r-- | src/mainboard/intel/adlrvp/devicetree_m.cb | 4 | ||||
-rw-r--r-- | src/mainboard/intel/adlrvp/devicetree_n.cb | 4 |
3 files changed, 0 insertions, 12 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb index 7afe27914f..f4e1fd97e1 100644 --- a/src/mainboard/intel/adlrvp/devicetree.cb +++ b/src/mainboard/intel/adlrvp/devicetree.cb @@ -170,10 +170,6 @@ chip soc/intel/alderlake register "cnvi_bt_audio_offload" = "true" - # set EPP to 45%: 45 * 256/100 = 115 = 0x73 - register "enable_energy_perf_pref" = "true" - register "energy_perf_pref_value" = "0x73" - # Intel Common SoC Config register "common_soc_config" = "{ .i2c[0] = { diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb index deff4dc86d..4a41df61f7 100644 --- a/src/mainboard/intel/adlrvp/devicetree_m.cb +++ b/src/mainboard/intel/adlrvp/devicetree_m.cb @@ -143,10 +143,6 @@ chip soc/intel/alderlake register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ" register "pch_hda_idisp_codec_enable" = "1" - # set EPP to 45%: 45 * 256/100 = 115 = 0x73 - register "enable_energy_perf_pref" = "true" - register "energy_perf_pref_value" = "0x73" - # Intel Common SoC Config register "common_soc_config" = "{ .gspi[1] = { diff --git a/src/mainboard/intel/adlrvp/devicetree_n.cb b/src/mainboard/intel/adlrvp/devicetree_n.cb index 0890649be3..ae9e11ec9b 100644 --- a/src/mainboard/intel/adlrvp/devicetree_n.cb +++ b/src/mainboard/intel/adlrvp/devicetree_n.cb @@ -116,10 +116,6 @@ chip soc/intel/alderlake register "cnvi_bt_audio_offload" = "true" - # set EPP to 45%: 45 * 256/100 = 115 = 0x73 - register "enable_energy_perf_pref" = "true" - register "energy_perf_pref_value" = "0x73" - # Intel Common SoC Config register "common_soc_config" = "{ .i2c[0] = { |