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-rw-r--r--src/soc/intel/cannonlake/Kconfig1
-rw-r--r--src/soc/intel/cannonlake/chip.c9
-rw-r--r--src/soc/intel/cannonlake/chip.h1
3 files changed, 8 insertions, 3 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index dab6622ac0..fc73210f75 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -70,6 +70,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_SPI
select SOC_INTEL_COMMON_BLOCK_TIMER
select SOC_INTEL_COMMON_BLOCK_UART
+ select SOC_INTEL_COMMON_BLOCK_XDCI
select SOC_INTEL_COMMON_NHLT
select SOC_INTEL_COMMON_RESET
select SSE2
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index b2689b0608..590bb4559d 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -19,6 +19,7 @@
#include <device/pci.h>
#include <fsp/api.h>
#include <fsp/util.h>
+#include <intelblocks/xdci.h>
#include <romstage_handoff.h>
#include <soc/intel/common/vbt.h>
#include <soc/pci_devs.h>
@@ -180,7 +181,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
{
int i;
FSP_S_CONFIG *params = &supd->FspsConfig;
- const struct device *dev = SA_DEV_ROOT;
+ struct device *dev = SA_DEV_ROOT;
config_t *config = dev->chip_info;
/* Parse device tree and enable/disable devices */
@@ -262,7 +263,11 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
}
}
- params->XdciEnable = config->XdciEnable;
+ /* Enable xDCI controller if enabled in devicetree and allowed */
+ dev = dev_find_slot(0, PCH_DEVFN_USBOTG);
+ if (!xdci_can_enable())
+ dev->enabled = 0;
+ params->XdciEnable = dev->enabled;
/* PCI Express */
for (i = 0; i < ARRAY_SIZE(config->PcieClkSrcUsage); i++) {
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 90956c308a..2362c4255e 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -124,7 +124,6 @@ struct soc_intel_cannonlake_config {
/* USB related */
struct usb2_port_config usb2_ports[16];
struct usb3_port_config usb3_ports[10];
- uint8_t XdciEnable;
uint8_t SsicPortEnable;
/* Wake Enable Bitmap for USB2 ports */
uint16_t usb2_wake_enable_bitmap;