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-rw-r--r--Makefile.inc2
-rw-r--r--src/soc/intel/braswell/Makefile.inc2
-rw-r--r--src/soc/intel/skylake/Makefile.inc2
3 files changed, 3 insertions, 3 deletions
diff --git a/Makefile.inc b/Makefile.inc
index 6225152b13..0caab91fb3 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -60,7 +60,7 @@ coreboot: build-dirs $(obj)/coreboot.rom $(obj)/cbfstool $(obj)/rmodtool $(obj)/
# targets after the build completes by creating a Makefile.inc in the
# site-local directory with a target named 'build_complete::'
build_complete:: coreboot
- printf "\nBuilt %s (%s)\n" $(MAINBOARD_DIR) \
+ printf "\nBuilt %s (%s)\n" $(MAINBOARDDIR) \
$(CONFIG_MAINBOARD_PART_NUMBER)
# This target can be used to run rules after all files were added to CBFS,
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc
index cfa5b4ce63..abd64a5ec0 100644
--- a/src/soc/intel/braswell/Makefile.inc
+++ b/src/soc/intel/braswell/Makefile.inc
@@ -57,7 +57,7 @@ CPPFLAGS_common += -I$(src)/soc/intel/braswell/
CPPFLAGS_common += -I$(src)/soc/intel/braswell/include
CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/braswell
-CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(MAINBOARD_DIR)
+CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(MAINBOARDDIR)
ifneq ($(CONFIG_GOP_SUPPORT),y)
ifneq ($(CONFIG_VGA_BIOS_FILE),)
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index aa3da61f22..d688747a93 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -107,7 +107,7 @@ CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/skykabylake
endif
# Currently used for microcode path.
-CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(MAINBOARD_DIR)
+CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(MAINBOARDDIR)
ROMCCFLAGS := -mcpu=p4 -fno-simplify-phi -O2