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-rw-r--r--src/mainboard/google/hatch/ramstage.c2
-rw-r--r--src/mainboard/prodrive/hermes/ramstage.c4
-rw-r--r--src/mainboard/purism/librem_cnl/ramstage.c2
-rw-r--r--src/mainboard/system76/lemp9/ramstage.c2
-rw-r--r--src/soc/intel/cannonlake/fsp_params.c4
-rw-r--r--src/soc/intel/cannonlake/include/soc/ramstage.h2
6 files changed, 9 insertions, 7 deletions
diff --git a/src/mainboard/google/hatch/ramstage.c b/src/mainboard/google/hatch/ramstage.c
index af8810063c..93864b2ad1 100644
--- a/src/mainboard/google/hatch/ramstage.c
+++ b/src/mainboard/google/hatch/ramstage.c
@@ -8,7 +8,7 @@
#include <variant/gpio.h>
#include <vendorcode/google/chromeos/chromeos.h>
-void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+void mainboard_silicon_init_params(FSPS_UPD *supd)
{
variant_devtree_update();
}
diff --git a/src/mainboard/prodrive/hermes/ramstage.c b/src/mainboard/prodrive/hermes/ramstage.c
index b8b147d9b6..72ae014409 100644
--- a/src/mainboard/prodrive/hermes/ramstage.c
+++ b/src/mainboard/prodrive/hermes/ramstage.c
@@ -8,8 +8,10 @@ static fsp_params parmas_list[] = {
/* FIXME: Fill with additional options */
};
-void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+void mainboard_silicon_init_params(FSPS_UPD *supd)
{
+ FSP_S_CONFIG *params = &supd->FspsConfig;
+
/* Configure pads prior to SiliconInit() in case there's any
dependencies during hardware initialization. */
program_gpio_pads();
diff --git a/src/mainboard/purism/librem_cnl/ramstage.c b/src/mainboard/purism/librem_cnl/ramstage.c
index e93911e324..381d03be13 100644
--- a/src/mainboard/purism/librem_cnl/ramstage.c
+++ b/src/mainboard/purism/librem_cnl/ramstage.c
@@ -3,7 +3,7 @@
#include <soc/ramstage.h>
#include "variant.h"
-void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+void mainboard_silicon_init_params(FSPS_UPD *supd)
{
/* Configure pads prior to SiliconInit() in case there's any
* dependencies during hardware initialization. */
diff --git a/src/mainboard/system76/lemp9/ramstage.c b/src/mainboard/system76/lemp9/ramstage.c
index 4b0ddd4823..35ffd53bc1 100644
--- a/src/mainboard/system76/lemp9/ramstage.c
+++ b/src/mainboard/system76/lemp9/ramstage.c
@@ -3,7 +3,7 @@
#include <soc/ramstage.h>
#include "gpio.h"
-void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+void mainboard_silicon_init_params(FSPS_UPD *supd)
{
/* Configure pads prior to SiliconInit() in case there's any
* dependencies during hardware initialization. */
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index 9b28d3d795..73b1bb53ed 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -143,7 +143,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* Load VBT before devicetree-specific config. */
params->GraphicsConfigPtr = (uintptr_t)vbt_get();
- mainboard_silicon_init_params(params);
+ mainboard_silicon_init_params(supd);
const struct soc_power_limits_config *soc_config;
soc_config = &config->power_limits_config;
@@ -527,7 +527,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
}
/* Mainboard GPIO Configuration */
-__weak void mainboard_silicon_init_params(FSP_S_CONFIG *params)
+__weak void mainboard_silicon_init_params(FSPS_UPD *supd)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
diff --git a/src/soc/intel/cannonlake/include/soc/ramstage.h b/src/soc/intel/cannonlake/include/soc/ramstage.h
index 96b11298a7..ff4fd59f8c 100644
--- a/src/soc/intel/cannonlake/include/soc/ramstage.h
+++ b/src/soc/intel/cannonlake/include/soc/ramstage.h
@@ -9,7 +9,7 @@
#include "../../chip.h"
-void mainboard_silicon_init_params(FSP_S_CONFIG *params);
+void mainboard_silicon_init_params(FSPS_UPD *supd);
void soc_init_pre_device(void *chip_info);
#endif