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-rw-r--r--src/soc/intel/cannonlake/Kconfig2
-rw-r--r--src/soc/intel/common/block/graphics/Kconfig14
-rw-r--r--src/soc/intel/common/block/graphics/graphics.c23
-rw-r--r--src/soc/intel/skylake/Kconfig2
4 files changed, 31 insertions, 10 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 7548e46b36..3aa06f43d8 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -64,7 +64,7 @@ config SOC_INTEL_CANNONLAKE_BASE
select SOC_INTEL_COMMON_NHLT
select SOC_INTEL_COMMON_PCH_CLIENT
select SOC_INTEL_COMMON_RESET
- select SOC_INTEL_CONFIGURE_DDI_A_4_LANES
+ select SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION
select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
select SSE2
select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/soc/intel/common/block/graphics/Kconfig b/src/soc/intel/common/block/graphics/Kconfig
index b5776b049f..eaa429ed39 100644
--- a/src/soc/intel/common/block/graphics/Kconfig
+++ b/src/soc/intel/common/block/graphics/Kconfig
@@ -8,10 +8,20 @@ config SOC_INTEL_COMMON_BLOCK_GRAPHICS
if SOC_INTEL_COMMON_BLOCK_GRAPHICS
-config SOC_INTEL_CONFIGURE_DDI_A_4_LANES
+config SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION
bool
help
- Selected by platforms that require DDI-A bifurcation setup.
+ Skylake, Kaby Lake and Coffee Lake desktop CPUs support eDP
+ bifurcation, i.e. 4 eDP lanes get split between DDI-A (eDP)
+ and DDI-E (DP, used for VGA). Selected from SoC Kconfig, if
+ applicable.
+
+config SOC_INTEL_GFX_ENABLE_DDI_E_BIFURCATION
+ bool
+ depends on SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION
+ help
+ Selected by mainboards that use DDI-E, which is most commonly
+ used to drive a DP-to-VGA adapter to provide a VGA connector.
config SOC_INTEL_DISABLE_IGD
bool "Disable Integrated GFX Controller (0:2:0)"
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index c38b30f3a7..1a0d64d7c7 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -124,6 +124,21 @@ int fsp_soc_report_external_display(void)
return graphics_get_framebuffer_address() && get_external_display_status();
}
+static void configure_ddi_a_bifurcation(void)
+{
+ u32 ddi_buf_ctl = graphics_gtt_read(DDI_BUF_CTL_A);
+ /* Only program if the buffer is not enabled yet. */
+ if (ddi_buf_ctl & DDI_BUF_CTL_ENABLE)
+ return;
+
+ if (CONFIG(SOC_INTEL_GFX_ENABLE_DDI_E_BIFURCATION))
+ ddi_buf_ctl &= ~DDI_A_4_LANES;
+ else
+ ddi_buf_ctl |= DDI_A_4_LANES;
+
+ graphics_gtt_write(DDI_BUF_CTL_A, ddi_buf_ctl);
+}
+
static void gma_init(struct device *const dev)
{
intel_gma_init_igd_opregion();
@@ -135,12 +150,8 @@ static void gma_init(struct device *const dev)
if (!CONFIG(RUN_FSP_GOP))
graphics_soc_panel_init(dev);
- if (CONFIG(SOC_INTEL_CONFIGURE_DDI_A_4_LANES) && !acpi_is_wakeup_s3()) {
- const u32 ddi_buf_ctl = graphics_gtt_read(DDI_BUF_CTL_A);
- /* Only program if the buffer is not enabled yet. */
- if (!(ddi_buf_ctl & DDI_BUF_CTL_ENABLE))
- graphics_gtt_write(DDI_BUF_CTL_A, ddi_buf_ctl | DDI_A_4_LANES);
- }
+ if (CONFIG(SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION) && !acpi_is_wakeup_s3())
+ configure_ddi_a_bifurcation();
/*
* GFX PEIM module inside FSP binary is taking care of graphics
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 0d388049a4..3ec84abcc4 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -62,7 +62,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
select SOC_INTEL_COMMON_NHLT
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
- select SOC_INTEL_CONFIGURE_DDI_A_4_LANES
+ select SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION
select SSE2
select SUPPORT_CPU_UCODE_IN_CBFS
select TSC_MONOTONIC_TIMER