diff options
| -rw-r--r-- | src/soc/intel/alderlake/romstage/fsp_params.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/romstage/fsp_params.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/tigerlake/romstage/fsp_params.c | 3 |
3 files changed, 3 insertions, 4 deletions
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index 71a1a5c92c..c0bdb0de2b 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -177,7 +177,7 @@ static void fill_fspm_security_params(FSP_M_CONFIG *m_cfg, { /* Disable BIOS Guard */ m_cfg->BiosGuard = 0; - m_cfg->TmeEnable = CONFIG(INTEL_TME); + m_cfg->TmeEnable = CONFIG(INTEL_TME) && is_tme_supported(); } static void fill_fspm_uart_params(FSP_M_CONFIG *m_cfg, diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c index 82927f7ca3..bd88c158de 100644 --- a/src/soc/intel/meteorlake/romstage/fsp_params.c +++ b/src/soc/intel/meteorlake/romstage/fsp_params.c @@ -134,7 +134,7 @@ static void fill_fspm_security_params(FSP_M_CONFIG *m_cfg, { /* Disable BIOS Guard */ m_cfg->BiosGuard = 0; - m_cfg->TmeEnable = CONFIG(INTEL_TME); + m_cfg->TmeEnable = CONFIG(INTEL_TME) && is_tme_supported(); } static void fill_fspm_uart_params(FSP_M_CONFIG *m_cfg, diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c index a9cb2ece4e..399cb87fe1 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params.c @@ -206,8 +206,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, m_cfg->CpuPcieRpEnableMask |= 1 << i; } - /* Change TmeEnable UPD value according to INTEL_TME Kconfig */ - m_cfg->TmeEnable = CONFIG(INTEL_TME); + m_cfg->TmeEnable = CONFIG(INTEL_TME) && is_tme_supported(); /* crashLog config */ m_cfg->CpuCrashLogDevice = CONFIG(SOC_INTEL_CRASHLOG) && is_devfn_enabled(SA_DEVFN_TMT); |