diff options
| -rw-r--r-- | src/soc/amd/common/block/psp/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/soc/amd/common/block/psp/psp_def.h | 7 | ||||
| -rw-r--r-- | src/soc/amd/common/block/psp/psp_gen2.c | 53 | ||||
| -rw-r--r-- | src/soc/amd/common/block/psp/spl_fuse.c | 49 |
4 files changed, 57 insertions, 54 deletions
diff --git a/src/soc/amd/common/block/psp/Makefile.inc b/src/soc/amd/common/block/psp/Makefile.inc index 3b115e732c..0f15963f06 100644 --- a/src/soc/amd/common/block/psp/Makefile.inc +++ b/src/soc/amd/common/block/psp/Makefile.inc @@ -29,4 +29,6 @@ ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_I2C3_TPM_SHARED_WITH_PSP) += tpm.c smm-y += psp_gen2.c smm-y += psp_smm_gen2.c +ramstage-$(CONFIG_HAVE_SPL_FILE) += spl_fuse.c + endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN2 diff --git a/src/soc/amd/common/block/psp/psp_def.h b/src/soc/amd/common/block/psp/psp_def.h index a1eceab278..773a9447d5 100644 --- a/src/soc/amd/common/block/psp/psp_def.h +++ b/src/soc/amd/common/block/psp/psp_def.h @@ -7,6 +7,12 @@ #include <commonlib/helpers.h> #include <amdblocks/psp.h> +#define CORE_2_PSP_MSG_38_OFFSET 0x10998 /* 4 byte */ +#define CORE_2_PSP_MSG_38_FUSE_SPL BIT(12) +#define CORE_2_PSP_MSG_38_SPL_FUSE_ERROR BIT(13) +#define CORE_2_PSP_MSG_38_SPL_ENTRY_ERROR BIT(14) +#define CORE_2_PSP_MSG_38_SPL_ENTRY_MISSING BIT(15) + /* x86 to PSP commands */ #define MBOX_BIOS_CMD_SMM_INFO 0x02 #define MBOX_BIOS_CMD_SX_INFO 0x03 @@ -108,6 +114,5 @@ void psp_print_cmd_status(int cmd_status, struct mbox_buffer_header *header); int send_psp_command(u32 command, void *buffer); uint32_t soc_read_c2p38(void); -void psp_set_spl_fuse(void *unused); #endif /* __AMD_PSP_DEF_H__ */ diff --git a/src/soc/amd/common/block/psp/psp_gen2.c b/src/soc/amd/common/block/psp/psp_gen2.c index e4adc8bf39..f647dcd215 100644 --- a/src/soc/amd/common/block/psp/psp_gen2.c +++ b/src/soc/amd/common/block/psp/psp_gen2.c @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <bootstate.h> -#include <console/console.h> #include <timer.h> #include <types.h> #include <amdblocks/psp.h> @@ -12,12 +10,6 @@ #define PSP_MAILBOX_BUFFER_L_OFFSET 0x10574 /* 4 bytes */ #define PSP_MAILBOX_BUFFER_H_OFFSET 0x10578 /* 4 bytes */ -#define CORE_2_PSP_MSG_38_OFFSET 0x10998 /* 4 byte */ -#define CORE_2_PSP_MSG_38_FUSE_SPL BIT(12) -#define CORE_2_PSP_MSG_38_SPL_FUSE_ERROR BIT(13) -#define CORE_2_PSP_MSG_38_SPL_ENTRY_ERROR BIT(14) -#define CORE_2_PSP_MSG_38_SPL_ENTRY_MISSING BIT(15) - union pspv2_mbox_command { u32 val; struct pspv2_mbox_cmd_fields { @@ -117,48 +109,3 @@ uint32_t soc_read_c2p38(void) { return smn_read32(SMN_PSP_PUBLIC_BASE + CORE_2_PSP_MSG_38_OFFSET); } - -void psp_set_spl_fuse(void *unused) -{ - int cmd_status = 0; - struct mbox_cmd_late_spl_buffer buffer = { - .header = { - .size = sizeof(buffer) - } - }; - uint32_t c2p38 = soc_read_c2p38(); - - if (c2p38 & CORE_2_PSP_MSG_38_FUSE_SPL) { - printk(BIOS_DEBUG, "PSP: SPL Fusing may be updated.\n"); - } else { - printk(BIOS_DEBUG, "PSP: SPL Fusing not currently required.\n"); - return; - } - - if (c2p38 & CORE_2_PSP_MSG_38_SPL_FUSE_ERROR) { - printk(BIOS_ERR, "PSP: SPL Table does not meet fuse requirements.\n"); - return; - } - - if (c2p38 & CORE_2_PSP_MSG_38_SPL_ENTRY_ERROR) { - printk(BIOS_ERR, "PSP: Critical SPL entry missing or current firmware does" - " not meet requirements.\n"); - return; - } - - if (c2p38 & CORE_2_PSP_MSG_38_SPL_ENTRY_MISSING) { - printk(BIOS_ERR, "PSP: Table of critical SPL values is missing.\n"); - return; - } - - if (!CONFIG(SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL)) - return; - - printk(BIOS_DEBUG, "PSP: SPL Fusing Update Requested.\n"); - cmd_status = send_psp_command(MBOX_BIOS_CMD_SET_SPL_FUSE, &buffer); - psp_print_cmd_status(cmd_status, NULL); -} - -#if CONFIG(HAVE_SPL_FILE) -BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_ENTRY, psp_set_spl_fuse, NULL); -#endif diff --git a/src/soc/amd/common/block/psp/spl_fuse.c b/src/soc/amd/common/block/psp/spl_fuse.c new file mode 100644 index 0000000000..d1313fb271 --- /dev/null +++ b/src/soc/amd/common/block/psp/spl_fuse.c @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <bootstate.h> +#include <console/console.h> +#include <types.h> +#include "psp_def.h" + +static void psp_set_spl_fuse(void *unused) +{ + int cmd_status = 0; + struct mbox_cmd_late_spl_buffer buffer = { + .header = { + .size = sizeof(buffer) + } + }; + uint32_t c2p38 = soc_read_c2p38(); + + if (c2p38 & CORE_2_PSP_MSG_38_FUSE_SPL) { + printk(BIOS_DEBUG, "PSP: SPL Fusing may be updated.\n"); + } else { + printk(BIOS_DEBUG, "PSP: SPL Fusing not currently required.\n"); + return; + } + + if (c2p38 & CORE_2_PSP_MSG_38_SPL_FUSE_ERROR) { + printk(BIOS_ERR, "PSP: SPL Table does not meet fuse requirements.\n"); + return; + } + + if (c2p38 & CORE_2_PSP_MSG_38_SPL_ENTRY_ERROR) { + printk(BIOS_ERR, "PSP: Critical SPL entry missing or current firmware does" + " not meet requirements.\n"); + return; + } + + if (c2p38 & CORE_2_PSP_MSG_38_SPL_ENTRY_MISSING) { + printk(BIOS_ERR, "PSP: Table of critical SPL values is missing.\n"); + return; + } + + if (!CONFIG(SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL)) + return; + + printk(BIOS_DEBUG, "PSP: SPL Fusing Update Requested.\n"); + cmd_status = send_psp_command(MBOX_BIOS_CMD_SET_SPL_FUSE, &buffer); + psp_print_cmd_status(cmd_status, NULL); +} + +BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_ENTRY, psp_set_spl_fuse, NULL); |