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-rw-r--r--src/mainboard/google/brya/variants/sundance/overridetree.cb51
1 files changed, 51 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/sundance/overridetree.cb b/src/mainboard/google/brya/variants/sundance/overridetree.cb
index bd5112fe44..65d7e95cac 100644
--- a/src/mainboard/google/brya/variants/sundance/overridetree.cb
+++ b/src/mainboard/google/brya/variants/sundance/overridetree.cb
@@ -152,6 +152,57 @@ chip soc/intel/alderlake
}"
device domain 0 on
+ device ref dtt on
+ chip drivers/intel/dptf
+ ## sensor information
+ register "options.tsr[0].desc" = ""CPU""
+ register "options.tsr[1].desc" = ""DDR""
+ register "options.tsr[2].desc" = ""5VCharger""
+
+
+ ## Passive Policy
+ register "policies.passive" = "{
+ [0] = DPTF_PASSIVE(CPU, CPU, 90, 10000),
+ [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000),
+ [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 80, 60000),
+ [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 15000),
+ }"
+
+ ## Critical Policy
+ register "policies.critical" = "{
+ [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
+ [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 100, SHUTDOWN),
+ [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 100, SHUTDOWN),
+ [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 100, SHUTDOWN),
+ }"
+
+ register "controls.power_limits" = "{
+ .pl1 = {
+ .min_power = 3000,
+ .max_power = 6000,
+ .time_window_min = 1 * MSECS_PER_SEC,
+ .time_window_max = 1 * MSECS_PER_SEC,
+ .granularity = 200,
+ },
+ .pl2 = {
+ .min_power = 25000,
+ .max_power = 25000,
+ .time_window_min = 1 * MSECS_PER_SEC,
+ .time_window_max = 1 * MSECS_PER_SEC,
+ .granularity = 1000,
+ }
+ }"
+
+ ## Charger Performance Control (Control, mA)
+ register "controls.charger_perf" = "{
+ [0] = { 255, 3000 },
+ [1] = { 24, 2000 },
+ [2] = { 16, 1500 },
+ [3] = { 8, 1000 }
+ }"
+ device generic 0 on end
+ end
+ end
device ref i2c1 on
chip drivers/i2c/hid
register "generic.hid" = ""GDIX0000""