diff options
| -rw-r--r-- | src/cpu/samsung/exynos5250/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/cpu/samsung/exynos5250/lowlevel_init_c.c | 6 |
2 files changed, 6 insertions, 3 deletions
diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index db28221179..3dcf461e1b 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -12,7 +12,6 @@ bootblock-y += clock.c romstage-y += clock.c romstage-y += clock_init.c romstage-y += exynos_cache.c -romstage-y += lowlevel_init_c.c romstage-y += pinmux.c romstage-y += power.c romstage-y += soc.c @@ -29,7 +28,6 @@ romstage-y += dmc_init_ddr3.c ramstage-y += clock.c ramstage-y += clock_init.c ramstage-y += exynos_cache.c -ramstage-y += lowlevel_init_c.c ramstage-y += pinmux.c ramstage-y += power.c ramstage-y += soc.c @@ -37,7 +35,6 @@ ramstage-y += uart.c #ramstage-$(CONFIG_EXYNOS_ACE_SHA) += ace_sha.c #ramstage-$(CONFIG_SATA_AHCI) += sata.c -ramstage-$(CONFIG_SPL_BUILD) += lowlevel_init_c.c exynos5250_add_bl1: $(obj)/coreboot.pre printf " DD Adding Samsung Exynos5250 BL1\n" diff --git a/src/cpu/samsung/exynos5250/lowlevel_init_c.c b/src/cpu/samsung/exynos5250/lowlevel_init_c.c index 848ebee4a8..daa691f19e 100644 --- a/src/cpu/samsung/exynos5250/lowlevel_init_c.c +++ b/src/cpu/samsung/exynos5250/lowlevel_init_c.c @@ -23,6 +23,12 @@ * MA 02111-1307 USA */ +/* + * FIXME: This file is essentially the "bootblock" leftover from U-Boot. For + * now it serves as a reference until all the resume-related stuff is added + * to the appropriate bootblock/romstage/ramstage files in coreboot. + */ + #include <common.h> #include <config.h> #include <cpu/samsung/exynos5-common/exynos5-common.h> |