diff options
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 9 |
2 files changed, 0 insertions, 10 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 96826e330c..0a23fcacd4 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -379,7 +379,6 @@ void sb_acpi_mmio_decode(void); void sb_pci_port80(void); void sb_read_mode(u32 mode); void sb_set_spi100(u16 norm, u16 fast, u16 alt, u16 tpm); -void sb_set_readspeed(u16 norm, u16 fast); void sb_tpm_decode(void); void sb_tpm_decode_spi(void); void lpc_wideio_512_window(uint16_t base); diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index a767e0c297..eb8820f250 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -442,15 +442,6 @@ void sb_disable_4dw_burst(void) & ~SPI_RD4DW_EN_HOST); } -void sb_set_readspeed(u16 norm, u16 fast) -{ - uintptr_t base = sb_spibase(); - write16((void *)base + SPI_CNTRL1, (read16((void *)base + SPI_CNTRL1) - & ~SPI_CNTRL1_SPEED_MASK) - | (norm << SPI_NORM_SPEED_SH) - | (fast << SPI_FAST_SPEED_SH)); -} - void sb_read_mode(u32 mode) { uintptr_t base = sb_spibase(); |