diff options
| -rw-r--r-- | src/mainboard/amd/inagua/BiosCallOuts.c | 4 | ||||
| -rw-r--r-- | src/mainboard/amd/south_station/BiosCallOuts.c | 4 | ||||
| -rw-r--r-- | src/mainboard/amd/union_station/BiosCallOuts.c | 4 | ||||
| -rw-r--r-- | src/mainboard/ocp/deltalake/ramstage.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/aoac.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/quark/include/soc/QuarkNcSocId.h | 2 |
6 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/amd/inagua/BiosCallOuts.c b/src/mainboard/amd/inagua/BiosCallOuts.c index 5eff97d726..72bd046b5b 100644 --- a/src/mainboard/amd/inagua/BiosCallOuts.c +++ b/src/mainboard/amd/inagua/BiosCallOuts.c @@ -45,7 +45,7 @@ static AGESA_STATUS board_BeforeDramInit(UINT32 Func, UINTN Data, VOID *ConfigPt TempData8 |= Data8; Write64Mem8(GpioMmioAddr + SB_GPIO_REG178, TempData8); - Data8 |= BIT2 + BIT3; + Data8 |= BIT2 | BIT3; Data8 &= ~BIT4; TempData8 = Read64Mem8(GpioMmioAddr + SB_GPIO_REG178); TempData8 &= 0x23; @@ -59,7 +59,7 @@ static AGESA_STATUS board_BeforeDramInit(UINT32 Func, UINTN Data, VOID *ConfigPt TempData8 |= Data8; Write64Mem8(GpioMmioAddr + SB_GPIO_REG179, TempData8); - Data8 |= BIT2 + BIT3; + Data8 |= BIT2 | BIT3; Data8 &= ~BIT4; TempData8 = Read64Mem8(GpioMmioAddr + SB_GPIO_REG179); TempData8 &= 0x23; diff --git a/src/mainboard/amd/south_station/BiosCallOuts.c b/src/mainboard/amd/south_station/BiosCallOuts.c index fb4e4d14aa..935e36812f 100644 --- a/src/mainboard/amd/south_station/BiosCallOuts.c +++ b/src/mainboard/amd/south_station/BiosCallOuts.c @@ -45,7 +45,7 @@ static AGESA_STATUS board_BeforeDramInit(UINT32 Func, UINTN Data, VOID *ConfigPt TempData8 |= Data8; Write64Mem8(GpioMmioAddr + SB_GPIO_REG178, TempData8); - Data8 |= BIT2 + BIT3; + Data8 |= BIT2 | BIT3; Data8 &= ~BIT4; TempData8 = Read64Mem8(GpioMmioAddr + SB_GPIO_REG178); TempData8 &= 0x23; @@ -59,7 +59,7 @@ static AGESA_STATUS board_BeforeDramInit(UINT32 Func, UINTN Data, VOID *ConfigPt TempData8 |= Data8; Write64Mem8(GpioMmioAddr + SB_GPIO_REG179, TempData8); - Data8 |= BIT2 + BIT3; + Data8 |= BIT2 | BIT3; Data8 &= ~BIT4; TempData8 = Read64Mem8(GpioMmioAddr + SB_GPIO_REG179); TempData8 &= 0x23; diff --git a/src/mainboard/amd/union_station/BiosCallOuts.c b/src/mainboard/amd/union_station/BiosCallOuts.c index 2d8fb22d5c..9fcecbc6cd 100644 --- a/src/mainboard/amd/union_station/BiosCallOuts.c +++ b/src/mainboard/amd/union_station/BiosCallOuts.c @@ -45,7 +45,7 @@ static AGESA_STATUS board_BeforeDramInit(UINT32 Func, UINTN Data, VOID *ConfigPt TempData8 |= Data8; Write64Mem8(GpioMmioAddr + SB_GPIO_REG178, TempData8); - Data8 |= BIT2 + BIT3; + Data8 |= BIT2 | BIT3; Data8 &= ~BIT4; TempData8 = Read64Mem8(GpioMmioAddr + SB_GPIO_REG178); TempData8 &= 0x23; @@ -59,7 +59,7 @@ static AGESA_STATUS board_BeforeDramInit(UINT32 Func, UINTN Data, VOID *ConfigPt TempData8 |= Data8; Write64Mem8(GpioMmioAddr + SB_GPIO_REG179, TempData8); - Data8 |= BIT2 + BIT3; + Data8 |= BIT2 | BIT3; Data8 &= ~BIT4; TempData8 = Read64Mem8(GpioMmioAddr + SB_GPIO_REG179); TempData8 &= 0x23; diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c index d8653b9002..81cc4ec276 100644 --- a/src/mainboard/ocp/deltalake/ramstage.c +++ b/src/mainboard/ocp/deltalake/ramstage.c @@ -331,7 +331,7 @@ unsigned int smbios_processor_family(struct cpuid_result res) unsigned int smbios_processor_characteristics(void) { /* 64-bit Capable, Multi-Core, Power/Performance Control */ - return 0x8c; /* BIT2 + BIT3 + BIT7 */ + return 0x8c; /* BIT2 | BIT3 | BIT7 */ } static void mainboard_enable(struct device *dev) diff --git a/src/soc/amd/common/block/include/amdblocks/aoac.h b/src/soc/amd/common/block/include/amdblocks/aoac.h index f4a00c73a7..455f32d9e6 100644 --- a/src/soc/amd/common/block/include/amdblocks/aoac.h +++ b/src/soc/amd/common/block/include/amdblocks/aoac.h @@ -10,7 +10,7 @@ #define AOAC_DEV_D3_STATE(device) (AOAC_DEV_D3_CTL(device) + 1) /* Bit definitions for Device D3 Control AOACx0000[40...7E; even byte addresses] */ -#define FCH_AOAC_TARGET_DEVICE_STATE (BIT(0) + BIT(1)) +#define FCH_AOAC_TARGET_DEVICE_STATE (BIT(0) | BIT(1)) #define FCH_AOAC_D0_UNINITIALIZED 0 #define FCH_AOAC_D0_INITIALIZED 1 #define FCH_AOAC_D1_2_3_WARM 2 diff --git a/src/soc/intel/quark/include/soc/QuarkNcSocId.h b/src/soc/intel/quark/include/soc/QuarkNcSocId.h index e4015a2e7c..4a62c04eeb 100644 --- a/src/soc/intel/quark/include/soc/QuarkNcSocId.h +++ b/src/soc/intel/quark/include/soc/QuarkNcSocId.h @@ -807,7 +807,7 @@ #define B_QNC_RCRB_SPIOPTYPE_NOADD_READ 0 #define B_QNC_RCRB_SPIOPTYPE_NOADD_WRITE (BIT0) #define B_QNC_RCRB_SPIOPTYPE_ADD_READ (BIT1) -#define B_QNC_RCRB_SPIOPTYPE_ADD_WRITE (BIT0 + BIT1) +#define B_QNC_RCRB_SPIOPTYPE_ADD_WRITE (BIT0 | BIT1) // Opcode Menu Configuration //R_OPMENU #define R_QNC_RCRB_SPIOPMENU (R_QNC_RCRB_SPIBASE + 0x58) |