summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--src/mainboard/intel/kblrvp/acpi/mipi_camera.asl166
-rw-r--r--src/mainboard/intel/kblrvp/dsdt.asl3
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb10
3 files changed, 175 insertions, 4 deletions
diff --git a/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl b/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl
new file mode 100644
index 0000000000..3fefeb1b49
--- /dev/null
+++ b/src/mainboard/intel/kblrvp/acpi/mipi_camera.asl
@@ -0,0 +1,166 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+Scope (\_SB.PCI0.I2C2)
+{
+ Device (PMIC)
+ {
+ Name (_HID, "INT3472") /* _HID: Hardware ID */
+ Name (_UID, Zero) // _UID: Unique ID */
+ Name (_DDN, "TPS68470 PMIC") /* _DDN: DOS Device Name */
+ Name (CAMD, 0x64)
+
+ Method (_STA, 0, NotSerialized) /* _STA: Status */
+ {
+ Return (0x0F)
+ }
+
+ Name (_CRS, ResourceTemplate ()
+ {
+ I2cSerialBus (0x004D, ControllerInitiated, 0x00061A80,
+ AddressingMode7Bit, "\\_SB.PCI0.I2C2",
+ 0x00, ResourceConsumer, ,
+ )
+ })
+ }
+
+ Device (CAM0)
+ {
+ Name (_HID, "OVTID858") /* _HID: Hardware ID */
+ Name (_UID, Zero) /* _UID: Unique ID */
+ Name (_DDN, "OV 13858 Camera") /* _DDN: DOS Device Name */
+ Name (CAMD, 0x02)
+
+ Method (_STA, 0, NotSerialized) /* _STA: Status */
+ {
+ Return (0x0F)
+ }
+
+ Name (_DEP, Package() {\_SB.PCI0.I2C2.PMIC})
+ Name (_CRS, ResourceTemplate ()
+ {
+ I2cSerialBus (0x0010, ControllerInitiated, 0x00061A80,
+ AddressingMode7Bit, "\\_SB.PCI0.I2C2",
+ 0x00, ResourceConsumer, ,
+ )
+ })
+
+ Method (SSDB, 0, Serialized)
+ {
+ Return (Buffer (0x5E)
+ {
+ /* 0000 */ 0x00, 0x50, 0x00, 0x00, 0x00, 0x00,0x00, 0x00,
+ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00,
+ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x03,
+ /* 0050 */ 0x09, 0x00, 0x02, 0x01, 0x00, 0x01, 0x00, 0x36,
+ /* 0058 */ 0x6E, 0x01, 0x00, 0x00, 0x00, 0x00
+ })
+ }
+ }
+
+ Device (VCM0)
+ {
+ Name (_HID, "DWDWD000") /* _HID: Hardware ID */
+ Name (_UID, Zero) /* _UID: Unique ID */
+ Name (_DDN, "Dongwoon AF DAC") /* _DDN: DOS Device Name */
+ Name (CAMD, 0x03)
+
+ Method (_STA, 0, NotSerialized) /* _STA: Status */
+ {
+ Return (0x0F)
+ }
+
+ Name (_DEP, Package() {\_SB.PCI0.I2C2.PMIC})
+ Name (_CRS, ResourceTemplate ()
+ {
+ I2cSerialBus (0x000C, ControllerInitiated, 0x00061A80,
+ AddressingMode7Bit, "\\_SB.PCI0.I2C2",
+ 0x00, ResourceConsumer, ,
+ )
+ })
+ }
+}
+
+Scope (\_SB.PCI0.I2C3)
+{
+ Device (PMIC)
+ {
+ Name (_HID, "INT3473") /* _HID: Hardware ID */
+ Name (_UID, Zero) /* _UID: Unique ID */
+ Name (_DDN, "TPS68470 PMIC 2") /* _DDN: DOS Device Name */
+ Name (CAMD, 0x64)
+
+ Method (_STA, 0, NotSerialized) /* _STA: Status */
+ {
+ Return (0x0F)
+ }
+
+ Name (_CRS, ResourceTemplate ()
+ {
+ I2cSerialBus (0x0049, ControllerInitiated, 0x00061A80,
+ AddressingMode7Bit, "\\_SB.PCI0.I2C3",
+ 0x00, ResourceConsumer, ,
+ )
+ })
+ }
+
+ Device (CAM1)
+ {
+ Name (_HID, "INT3479") /* _HID: Hardware ID */
+ Name (_UID, Zero) /* _UID: Unique ID */
+ Name (_DDN, "OV 5670 Camera") /* _DDN: DOS Device Name */
+ Name (CAMD, 0x02)
+
+ Method (_STA, 0, NotSerialized) /* _STA: Status */
+ {
+ Return (0x0F)
+ }
+
+ Name (_DEP, Package() {\_SB.PCI0.I2C3.PMIC})
+ Name (_CRS, ResourceTemplate ()
+ {
+ I2cSerialBus (0x0010, ControllerInitiated, 0x00061A80,
+ AddressingMode7Bit, "\\_SB.PCI0.I2C3",
+ 0x00, ResourceConsumer, ,
+ )
+ })
+
+ Method (SSDB, 0, Serialized)
+ {
+ Return (Buffer (0x5E)
+ {
+ /* 0000 */ 0x00, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 0x00, 0x00,
+ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0028 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0030 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0038 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0040 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* 0048 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x03,
+ /* 0050 */ 0x09, 0x00, 0x02, 0x01, 0x00, 0x01, 0x00, 0x36,
+ /* 0058 */ 0x6E, 0x01, 0x00, 0x00, 0x00, 0x00
+ })
+ }
+ }
+}
diff --git a/src/mainboard/intel/kblrvp/dsdt.asl b/src/mainboard/intel/kblrvp/dsdt.asl
index 25e6a30a6d..76e9efd36e 100644
--- a/src/mainboard/intel/kblrvp/dsdt.asl
+++ b/src/mainboard/intel/kblrvp/dsdt.asl
@@ -44,6 +44,9 @@ DefinitionBlock(
#include "acpi/dptf.asl"
}
+ /* MIPI camera */
+ #include "acpi/mipi_camera.asl"
+
#if IS_ENABLED(CONFIG_CHROMEOS)
// Chrome OS specific
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb
index ac99a211ef..c1974ad718 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb
@@ -37,6 +37,8 @@ chip soc/intel/skylake
register "HeciEnabled" = "0"
register "SaGv" = "3"
register "PmTimerDisabled" = "1"
+ register "Cio2Enable" = "1"
+ register "SaImguEnable" = "1"
register "pirqa_routing" = "PCH_IRQ11"
register "pirqb_routing" = "PCH_IRQ10"
@@ -186,8 +188,8 @@ chip soc/intel/skylake
register "SerialIoDevMode" = "{ \
[PchSerialIoIndexI2C0] = PchSerialIoPci, \
[PchSerialIoIndexI2C1] = PchSerialIoPci, \
- [PchSerialIoIndexI2C2] = PchSerialIoDisabled, \
- [PchSerialIoIndexI2C3] = PchSerialIoDisabled, \
+ [PchSerialIoIndexI2C2] = PchSerialIoPci, \
+ [PchSerialIoIndexI2C3] = PchSerialIoPci, \
[PchSerialIoIndexI2C4] = PchSerialIoPci, \
[PchSerialIoIndexI2C5] = PchSerialIoDisabled, \
[PchSerialIoIndexSpi0] = PchSerialIoDisabled, \
@@ -214,8 +216,8 @@ chip soc/intel/skylake
device pci 14.2 on end # Thermal Subsystem
device pci 15.0 on end # I2C #0
device pci 15.1 on end # I2C #1
- device pci 15.2 off end # I2C #2
- device pci 15.3 off end # I2C #3
+ device pci 15.2 on end # I2C #2
+ device pci 15.3 on end # I2C #3
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 23:00:30 +0000