diff options
52 files changed, 68 insertions, 68 deletions
diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index 2e15ea9cc8..6417ef891e 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -1937,15 +1937,15 @@ int get_acpi_table_revision(enum acpi_tables table) return 2; case TPM2: return 4; - case SSDT: /* ACPI 3.0 upto 6.3: 2 */ + case SSDT: /* ACPI 3.0 up to 6.3: 2 */ return 2; - case SRAT: /* ACPI 2.0: 1, ACPI 3.0: 2, ACPI 4.0 upto 6.3: 3 */ + case SRAT: /* ACPI 2.0: 1, ACPI 3.0: 2, ACPI 4.0 up to 6.3: 3 */ return 1; /* TODO Should probably be upgraded to 2 */ case HMAT: /* ACPI 6.4: 2 */ return 2; case DMAR: return 1; - case SLIT: /* ACPI 2.0 upto 6.3: 1 */ + case SLIT: /* ACPI 2.0 up to 6.3: 1 */ return 1; case SPMI: /* IMPI 2.0 */ return 5; @@ -1957,13 +1957,13 @@ int get_acpi_table_revision(enum acpi_tables table) return IVRS_FORMAT_MIXED; case DBG2: return 0; - case FACS: /* ACPI 2.0/3.0: 1, ACPI 4.0 upto 6.3: 2 */ + case FACS: /* ACPI 2.0/3.0: 1, ACPI 4.0 up to 6.3: 2 */ return 1; - case RSDT: /* ACPI 1.0 upto 6.3: 1 */ + case RSDT: /* ACPI 1.0 up to 6.3: 1 */ return 1; - case XSDT: /* ACPI 2.0 upto 6.3: 1 */ + case XSDT: /* ACPI 2.0 up to 6.3: 1 */ return 1; - case RSDP: /* ACPI 2.0 upto 6.3: 2 */ + case RSDP: /* ACPI 2.0 up to 6.3: 2 */ return 2; case EINJ: return 1; diff --git a/src/acpi/device.c b/src/acpi/device.c index 4b59990e5f..1df179bad6 100644 --- a/src/acpi/device.c +++ b/src/acpi/device.c @@ -139,7 +139,7 @@ static ssize_t acpi_device_path_fill(const struct device *dev, char *buf, /* * Warning: just as with dev_path() this uses a static buffer - * so should not be called mulitple times in one statement + * so should not be called multiple times in one statement */ const char *acpi_device_path(const struct device *dev) { diff --git a/src/arch/arm/armv7/cpu.S b/src/arch/arm/armv7/cpu.S index c53119c8d1..bc3ebd90a0 100644 --- a/src/arch/arm/armv7/cpu.S +++ b/src/arch/arm/armv7/cpu.S @@ -16,7 +16,7 @@ * the LSB of the set field, but the latter contains the LSB of the way field * minus the highest valid set field... such that when you subtract it from a * [way:0:level] field you end up with a [way - 1:highest_set:level] field - * through the magic of double subtraction. It's quite ingenius, really. + * through the magic of double subtraction. It's quite ingenious, really. * Takes care to only use r0-r3 and ip so it's pefectly ABI-compatible without * needing to write to memory. * diff --git a/src/arch/arm64/include/arch/asm.h b/src/arch/arm64/include/arch/asm.h index e6246c39da..df5952a576 100644 --- a/src/arch/arm64/include/arch/asm.h +++ b/src/arch/arm64/include/arch/asm.h @@ -19,7 +19,7 @@ .size name, .-name /* - * Certain SoCs have an alignment requiremnt for the CPU reset vector. + * Certain SoCs have an alignment requirement for the CPU reset vector. * Align to a 64 byte typical cacheline for now. */ #define CPU_RESET_ENTRY(name) ENTRY_WITH_ALIGN(name, 6) diff --git a/src/arch/riscv/fit_payload.c b/src/arch/riscv/fit_payload.c index abce57ee08..f7f4106cae 100644 --- a/src/arch/riscv/fit_payload.c +++ b/src/arch/riscv/fit_payload.c @@ -7,7 +7,7 @@ #include <fit.h> #include <endian.h> -/* Implements a Berkley Boot Loader (BBL) compatible payload loading */ +/* Implements a Berkeley Boot Loader (BBL) compatible payload loading */ #define MAX_KERNEL_SIZE (64*MiB) diff --git a/src/arch/riscv/opensbi.c b/src/arch/riscv/opensbi.c index e719560db3..3a738ec83a 100644 --- a/src/arch/riscv/opensbi.c +++ b/src/arch/riscv/opensbi.c @@ -2,7 +2,7 @@ #include <sbi/fw_dynamic.h> #include <arch/boot.h> -/* DO NOT INLCUDE COREBOOT HEADERS HERE */ +/* DO NOT INCLUDE COREBOOT HEADERS HERE */ void run_opensbi(const int hart_id, const void *fdt, diff --git a/src/arch/x86/c_start.S b/src/arch/x86/c_start.S index a4a7b28cbb..cb7d5045ff 100644 --- a/src/arch/x86/c_start.S +++ b/src/arch/x86/c_start.S @@ -217,7 +217,7 @@ SetCodeSelector: # use iret to jump to a 64-bit offset in a new code segment # iret will pop cs:rip, flags, then ss:rsp mov %ss, %ax # need to push ss.. - push %rax # push ss instuction not valid in x64 mode, + push %rax # push ss instruction not valid in x64 mode, # so use ax push %rsp pushfq diff --git a/src/commonlib/bsd/include/commonlib/bsd/compiler.h b/src/commonlib/bsd/include/commonlib/bsd/compiler.h index ee2ff88d10..4dd09bc90c 100644 --- a/src/commonlib/bsd/include/commonlib/bsd/compiler.h +++ b/src/commonlib/bsd/include/commonlib/bsd/compiler.h @@ -36,7 +36,7 @@ #endif /* This evaluates to the type of the first expression, unless that is constant - in which case it evalutates to the type of the second. This is useful when + in which case it evaluates to the type of the second. This is useful when assigning macro parameters to temporary variables, because that would normally circumvent the special loosened type promotion rules for integer literals. By using this macro, the promotion can happen at the time the diff --git a/src/commonlib/include/commonlib/iobuf.h b/src/commonlib/include/commonlib/iobuf.h index 472b3687b5..0de7d3e66c 100644 --- a/src/commonlib/include/commonlib/iobuf.h +++ b/src/commonlib/include/commonlib/iobuf.h @@ -81,7 +81,7 @@ int ibuf_split(const struct ibuf *src, struct ibuf *a, struct ibuf *b, /* Out-of-band drain of ibuf by returning pointer to data of specified size. */ const void *ibuf_oob_drain(struct ibuf *ib, size_t sz); -/* Read arbitray data from input buffer. */ +/* Read arbitrary data from input buffer. */ int ibuf_read(struct ibuf *ib, void *data, size_t sz); /* Read big endian fixed size values. */ @@ -125,7 +125,7 @@ int obuf_split(const struct obuf *src, struct obuf *a, struct obuf *b, /* Fill the buffer out-of-band. The size is accounted for. */ void *obuf_oob_fill(struct obuf *ob, size_t sz); -/* Write arbitray data to output buffer. */ +/* Write arbitrary data to output buffer. */ int obuf_write(struct obuf *ob, const void *data, size_t sz); /* Write big endian fixed size values. */ diff --git a/src/console/Kconfig b/src/console/Kconfig index 4125e18dd9..4c2e768685 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -193,7 +193,7 @@ config CONSOLE_NE2K help Send coreboot debug output to a Ethernet console, it works same way as Linux netconsole, packets are received to UDP - port 6666 on IP/MAC specified with options bellow. + port 6666 on IP/MAC specified with options below. Use following netcat command: nc -u -l -p 6666 config CONSOLE_NE2K_DST_MAC diff --git a/src/cpu/x86/64bit/exit32.inc b/src/cpu/x86/64bit/exit32.inc index 91cccb535e..4d1149ee6c 100644 --- a/src/cpu/x86/64bit/exit32.inc +++ b/src/cpu/x86/64bit/exit32.inc @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * For droping from long mode to protected mode. + * For dropping from long mode to protected mode. * * For reference see "AMD64 ArchitectureProgrammer's Manual Volume 2", * Document 24593-Rev. 3.31-July 2019 Chapter 5.3 @@ -47,7 +47,7 @@ SetCodeSelector32: # use iret to jump to a 32-bit offset in a new code segment # iret will pop cs:rip, flags, then ss:rsp - mov %ss, %ax # need to push ss, but push ss instuction + mov %ss, %ax # need to push ss, but push ss instruction push %rax # not valid in x64 mode, so use ax push %rdx # the rsp to load pushfq # push rflags diff --git a/src/cpu/x86/pae/pgtbl.c b/src/cpu/x86/pae/pgtbl.c index 814dbf5c70..c8783d6234 100644 --- a/src/cpu/x86/pae/pgtbl.c +++ b/src/cpu/x86/pae/pgtbl.c @@ -104,7 +104,7 @@ void paging_disable_pae(void) * Use PAE to map a page and then memset it with the pattern specified. * In order to use PAE pagetables for virtual addressing are set up and reloaded * on a 2MiB boundary. After the function is done, virtual addressing mode is - * disabled again. The PAT are set to all cachable, but MTRRs still apply. + * disabled again. The PAT are set to all cacheable, but MTRRs still apply. * * Requires a scratch memory for pagetables and a virtual address for * non identity mapped memory. @@ -124,7 +124,7 @@ void paging_disable_pae(void) * Content at physical address isn't preserved. * @param length The length of the memory segment to memset * @param dest Physical memory address to memset - * @param pat The pattern to write to the pyhsical memory + * @param pat The pattern to write to the physical memory * @return 0 on success, 1 on error */ int memset_pae(uint64_t dest, unsigned char pat, uint64_t length, void *pgtbl, diff --git a/src/cpu/x86/sipi_vector.S b/src/cpu/x86/sipi_vector.S index 44b772bcc2..496fd345eb 100644 --- a/src/cpu/x86/sipi_vector.S +++ b/src/cpu/x86/sipi_vector.S @@ -57,7 +57,7 @@ _start: movw %cs, %ax movw %ax, %ds - /* The gdtaddr needs to be releative to the data segment in order + /* The gdtaddr needs to be relative to the data segment in order * to properly dereference it. The .text section comes first in an * rmodule so _start can be used as a proxy for the load address. */ movl $(gdtaddr), %ebx diff --git a/src/device/Kconfig b/src/device/Kconfig index 5ae3466d32..ea3e241c82 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -166,7 +166,7 @@ config ALWAYS_RUN_OPROM def_bool n depends on VGA_ROM_RUN && ALWAYS_LOAD_OPROM help - Always uncondtionally run the option regardless of other + Always unconditionally run the option regardless of other policies. config ON_DEVICE_ROM_LOAD diff --git a/src/device/azalia_device.c b/src/device/azalia_device.c index 9202f72a4e..70f8348a7c 100644 --- a/src/device/azalia_device.c +++ b/src/device/azalia_device.c @@ -289,7 +289,7 @@ void azalia_audio_init(struct device *dev) if (!res) return; - // NOTE this will break as soon as the azalia_audio get's a bar above 4G. + // NOTE this will break as soon as the azalia_audio gets a bar above 4G. // Is there anything we can do about it? base = res2mmio(res, 0, 0); printk(BIOS_DEBUG, "azalia_audio: base = %p\n", base); diff --git a/src/device/dram/ddr4.c b/src/device/dram/ddr4.c index 83beeafba1..c5a8d13f53 100644 --- a/src/device/dram/ddr4.c +++ b/src/device/dram/ddr4.c @@ -205,7 +205,7 @@ int spd_decode_ddr4(struct dimm_attr_ddr4_st *dimm, spd_raw_data spd) /* Verify CRC of blocks that have them, do not step over 'used' length */ for (int i = 0; i < ARRAY_SIZE(spd_blocks); i++) { - /* this block is not checksumed */ + /* this block is not checksummed */ if (spd_blocks[i].crc_start == 0) continue; /* we shouldn't have this block */ diff --git a/src/device/oprom/include/x86emu/regs.h b/src/device/oprom/include/x86emu/regs.h index 7640c78896..52f599dbda 100644 --- a/src/device/oprom/include/x86emu/regs.h +++ b/src/device/oprom/include/x86emu/regs.h @@ -54,7 +54,7 @@ * EAX & 0xff === AL * EAX & 0xffff == AX * - * etc. The result is that alot of the calculations can then be + * etc. The result is that a lot of the calculations can then be * done using the native instruction set fully. */ diff --git a/src/device/oprom/x86emu/LICENSE b/src/device/oprom/x86emu/LICENSE index f13d4188ac..f1c26ccf6a 100644 --- a/src/device/oprom/x86emu/LICENSE +++ b/src/device/oprom/x86emu/LICENSE @@ -1,7 +1,7 @@ License information ------------------- -The x86emu library is under a BSD style license, comaptible +The x86emu library is under a BSD style license, compatible with the XFree86 and X licenses used by XFree86. The original x86emu libraries were under the GNU General Public License. Due to license incompatibilities between the GPL diff --git a/src/device/oprom/x86emu/prim_ops.c b/src/device/oprom/x86emu/prim_ops.c index d794ecb46c..2350ac1490 100644 --- a/src/device/oprom/x86emu/prim_ops.c +++ b/src/device/oprom/x86emu/prim_ops.c @@ -2458,7 +2458,7 @@ void x86emu_cpuid(void) switch (feature) { case 0: /* Regardless if we have real data from the hardware, the emulator - * will only support upto feature 1, which we set in register EAX. + * will only support up to feature 1, which we set in register EAX. * Registers EBX:EDX:ECX contain a string identifying the CPU. */ M.x86.R_EAX = 1; diff --git a/src/device/pci_early.c b/src/device/pci_early.c index 3a4d2e020c..590b170142 100644 --- a/src/device/pci_early.c +++ b/src/device/pci_early.c @@ -104,7 +104,7 @@ void pci_early_bridge_init(void) } /* FIXME: A lot of issues using the following, please avoid. - * Assumes 256 PCI busses, scans them all even when PCI bridges are still + * Assumes 256 PCI buses, scans them all even when PCI bridges are still * disabled. Probes all functions even if 0 is not present. */ pci_devfn_t pci_locate_device(unsigned int pci_id, pci_devfn_t dev) diff --git a/src/device/pnp_device.c b/src/device/pnp_device.c index 699007d9ba..88072b9a77 100644 --- a/src/device/pnp_device.c +++ b/src/device/pnp_device.c @@ -238,7 +238,7 @@ static void pnp_get_ioresource(struct device *dev, u8 index, u16 mask) resource->limit = (1 << (bit + 1)) - 1; /* The block of ones in the mask is expected to be continuous. - If there is any zero inbetween the block of ones, it is ignored + If there is any zero in between the block of ones, it is ignored in the calculation of the resource size and limit. */ if (mask != (resource->limit ^ (resource->size - 1))) printk(BIOS_WARNING, diff --git a/src/device/resource_allocator_v4.c b/src/device/resource_allocator_v4.c index b94c295edc..6f8159e1b1 100644 --- a/src/device/resource_allocator_v4.c +++ b/src/device/resource_allocator_v4.c @@ -637,7 +637,7 @@ static void allocate_domain_resources(const struct device *domain) * order to accomplish best fit for the resources, a list of ranges is maintained by each * resource type (i/o and mem). Domain does not differentiate between mem and prefmem. Since * they are allocated space from the same window, the resource allocator at the domain level - * ensures that the biggest requirement is selected indepedent of the prefetch type. Once the + * ensures that the biggest requirement is selected independent of the prefetch type. Once the * resource allocation for all immediate downstream devices is complete at the domain level, * resource allocator walks down the subtree for each downstream bridge to continue the * allocation process at the bridge level. Since bridges have separate windows for i/o, mem and diff --git a/src/drivers/amd/agesa/cache_as_ram.S b/src/drivers/amd/agesa/cache_as_ram.S index 1e15eda017..0d678d1889 100644 --- a/src/drivers/amd/agesa/cache_as_ram.S +++ b/src/drivers/amd/agesa/cache_as_ram.S @@ -5,7 +5,7 @@ * * $Workfile:: cache_as_ram.S * - * Description: cache_as_ram.S - AGESA Module Entry Point for GCC complier + * Description: cache_as_ram.S - AGESA Module Entry Point for GCC compiler * ****************************************************************************** */ diff --git a/src/drivers/crb/tpm.c b/src/drivers/crb/tpm.c index fcefe96448..9c8f2498dc 100644 --- a/src/drivers/crb/tpm.c +++ b/src/drivers/crb/tpm.c @@ -6,7 +6,7 @@ * * TPM starts in IDLE Mode * - * IDLE --> READY --> Command Receiption + * IDLE --> READY --> Command Reception * ^ | * | v -- Cmd Complete <-- Command Execution diff --git a/src/drivers/generic/gpio_keys/chip.h b/src/drivers/generic/gpio_keys/chip.h index 88dfe2ea71..01f4a1299c 100644 --- a/src/drivers/generic/gpio_keys/chip.h +++ b/src/drivers/generic/gpio_keys/chip.h @@ -81,7 +81,7 @@ struct drivers_generic_gpio_keys_config { struct acpi_gpio gpio; /* Is this a polled GPIO button? - Optional */ bool is_polled; - /* Poll inverval - Mandatory only if GPIO is polled. */ + /* Poll interval - Mandatory only if GPIO is polled. */ uint32_t poll_interval; /* Details about the key - Mandatory */ struct key_info key; diff --git a/src/drivers/i2c/lm96000/chip.h b/src/drivers/i2c/lm96000/chip.h index 128d1ec411..bb86f4e465 100644 --- a/src/drivers/i2c/lm96000/chip.h +++ b/src/drivers/i2c/lm96000/chip.h @@ -90,7 +90,7 @@ struct lm96000_temp_zone { enum { /* turn fan off below `low_temp - hysteresis` */ LM96000_LOW_TEMP_OFF = 0, - /* keep PWM at mininum duty cycle */ + /* keep PWM at minimum duty cycle */ LM96000_LOW_TEMP_MIN = 1, } min_off; u8 hysteresis; diff --git a/src/drivers/i2c/nct7802y/chip.h b/src/drivers/i2c/nct7802y/chip.h index 03c464af82..c4a767debf 100644 --- a/src/drivers/i2c/nct7802y/chip.h +++ b/src/drivers/i2c/nct7802y/chip.h @@ -37,7 +37,7 @@ enum nct7802y_fan_mode { enum nct7802y_fan_smartmode { SMART_FAN_DUTY = 0, /* Target values given in duty cycle %. */ - SMART_FAN_RPM, /* Target valuse given in RPM. */ + SMART_FAN_RPM, /* Target values given in RPM. */ }; enum nct7802y_fan_speed { diff --git a/src/drivers/i2c/tpm/cr50.c b/src/drivers/i2c/tpm/cr50.c index 8e12d1f044..a8a310fc7f 100644 --- a/src/drivers/i2c/tpm/cr50.c +++ b/src/drivers/i2c/tpm/cr50.c @@ -3,7 +3,7 @@ /* Based on Linux Kernel TPM driver */ /* - * cr50 is a TPM 2.0 capable device that requries special + * cr50 is a TPM 2.0 capable device that requires special * handling for the I2C interface. * * - Use an interrupt for transaction status instead of hardcoded delays diff --git a/src/drivers/i2c/tpm/tpm.c b/src/drivers/i2c/tpm/tpm.c index ee23ea7c44..b96099cccc 100644 --- a/src/drivers/i2c/tpm/tpm.c +++ b/src/drivers/i2c/tpm/tpm.c @@ -35,7 +35,7 @@ /* max. number of iterations after I2C NAK for 'long' commands * we need this especially for sending TPM_READY, since the cleanup after the - * transtion to the ready state may take some time, but it is unpredictable + * transition to the ready state may take some time, but it is unpredictable * how long it will take. */ #define MAX_COUNT_LONG 50 diff --git a/src/drivers/i2c/ww_ring/ww_ring_programs.c b/src/drivers/i2c/ww_ring/ww_ring_programs.c index 7576a3bfb7..73dd4dabf1 100644 --- a/src/drivers/i2c/ww_ring/ww_ring_programs.c +++ b/src/drivers/i2c/ww_ring/ww_ring_programs.c @@ -91,7 +91,7 @@ static const TiLp55231Program solid_000000_program = { * * When solid patterns are deployed with instanteneous color intensity * changes, all three LEDs can be controlled by one engine in sequential - * accesses. But the controllers still neeed to be synchronized. + * accesses. But the controllers still need to be synchronized. * * The maximum timer duration of lp55231 is .48 seconds. To achieve longer * blinking intervals the loops delays are deployed. Only the first controller diff --git a/src/drivers/i2c/ww_ring/ww_ring_programs.h b/src/drivers/i2c/ww_ring/ww_ring_programs.h index 4f936515d0..47d1c77339 100644 --- a/src/drivers/i2c/ww_ring/ww_ring_programs.h +++ b/src/drivers/i2c/ww_ring/ww_ring_programs.h @@ -21,7 +21,7 @@ #include <stdint.h> #include "drivers/i2c/ww_ring/ww_ring.h" -/* There are threee independent engines/cores in the controller. */ +/* There are three independent engines/cores in the controller. */ #define LP55231_NUM_OF_ENGINES 3 /* Number of lp55321 controllers on the ring */ @@ -29,7 +29,7 @@ /* * Structure to describe an lp55231 program: pointer to the text of the - * program, its size and load address (load addr + size sould not exceed + * program, its size and load address (load addr + size should not exceed * LP55231_MAX_PROG_SIZE), and start addresses for all of the three * engines. */ diff --git a/src/drivers/ipmi/ipmi_fru.c b/src/drivers/ipmi/ipmi_fru.c index 976df1cb9e..31ac6c0d9c 100644 --- a/src/drivers/ipmi/ipmi_fru.c +++ b/src/drivers/ipmi/ipmi_fru.c @@ -525,7 +525,7 @@ void print_fru_areas(struct fru_info_str *fru_info_str) if (prod_info.product_name != NULL) printk(BIOS_DEBUG, "product name: %s\n", prod_info.product_name); if (prod_info.product_partnumber != NULL) - printk(BIOS_DEBUG, "product part numer: %s\n", prod_info.product_partnumber); + printk(BIOS_DEBUG, "product part number: %s\n", prod_info.product_partnumber); if (prod_info.product_version != NULL) printk(BIOS_DEBUG, "product version: %s\n", prod_info.product_version); if (prod_info.serial_number != NULL) diff --git a/src/drivers/ipmi/supermicro_oem.c b/src/drivers/ipmi/supermicro_oem.c index 87b7fe243a..9d5ffc77a4 100644 --- a/src/drivers/ipmi/supermicro_oem.c +++ b/src/drivers/ipmi/supermicro_oem.c @@ -26,7 +26,7 @@ static void set_coreboot_ver(const uint16_t kcs_port) int ret; size_t i; - /* Only 8 charactars are visible in UI. Cut of on first dash */ + /* Only 8 characters are visible in UI. Cut of on first dash */ for (i = 0; i < 15; i++) { if (coreboot_ver[i] == '-') break; diff --git a/src/drivers/net/Kconfig b/src/drivers/net/Kconfig index 282075b31d..7e111f6569 100644 --- a/src/drivers/net/Kconfig +++ b/src/drivers/net/Kconfig @@ -33,7 +33,7 @@ config RT8168_SET_LED_MODE select REALTEK_8168_RESET help This is to set a customized LED mode to distinguish 10/100/1000 - link and speed status with limited LEDs avaiable on a board. + link and speed status with limited LEDs available on a board. Please refer to RTL811x datasheet section 7.2 Customizable LED Configuration for details. With this flag enabled, the customized_leds variable will be read from devicetree setting. diff --git a/src/drivers/net/atl1e.c b/src/drivers/net/atl1e.c index 9b1b2ab953..97ad14091d 100644 --- a/src/drivers/net/atl1e.c +++ b/src/drivers/net/atl1e.c @@ -127,7 +127,7 @@ static void atl1e_init(struct device *dev) /* Check if the base is invalid */ if (!mem_base) { - printk(BIOS_ERR, "atl1e: Error cant find MEM resource\n"); + printk(BIOS_ERR, "atl1e: Error can't find MEM resource\n"); return; } /* Enable but do not set bus master */ diff --git a/src/drivers/net/r8168.c b/src/drivers/net/r8168.c index 398b15d93c..1fd6eddbb3 100644 --- a/src/drivers/net/r8168.c +++ b/src/drivers/net/r8168.c @@ -280,7 +280,7 @@ static void r8168_init(struct device *dev) /* Check if the base is invalid */ if (!io_base) { - printk(BIOS_ERR, "r8168: Error cant find IO resource\n"); + printk(BIOS_ERR, "r8168: Error can't find IO resource\n"); return; } /* Enable but do not set bus master */ diff --git a/src/drivers/spi/spi_sdcard.c b/src/drivers/spi/spi_sdcard.c index a670111891..0a18953395 100644 --- a/src/drivers/spi/spi_sdcard.c +++ b/src/drivers/spi/spi_sdcard.c @@ -683,7 +683,7 @@ int spi_sdcard_single_write(const struct spi_sdcard *card, spi_sdcard_sendbyte(card, 0xff & (c >> 8)); spi_sdcard_sendbyte(card, 0xff & (c >> 0)); - /* recevie and verify data response token */ + /* receive and verify data response token */ c = spi_sdcard_recvbyte(card); if ((c & CT_RESPONSE_MASK) != CT_RESPONSE_ACCEPTED) { spi_sdcard_disable_cs(card); @@ -742,7 +742,7 @@ int spi_sdcard_multiple_write(const struct spi_sdcard *card, spi_sdcard_sendbyte(card, 0xff & (c >> 8)); spi_sdcard_sendbyte(card, 0xff & (c >> 0)); - /* recevie and verify data response token */ + /* receive and verify data response token */ c = spi_sdcard_recvbyte(card); if ((c & CT_RESPONSE_MASK) != CT_RESPONSE_ACCEPTED) break; diff --git a/src/drivers/spi/tpm/tpm.c b/src/drivers/spi/tpm/tpm.c index 1ad1eaac48..30b18761ef 100644 --- a/src/drivers/spi/tpm/tpm.c +++ b/src/drivers/spi/tpm/tpm.c @@ -3,7 +3,7 @@ * * It assumes that the required SPI interface has been initialized before the * driver is started. A 'sruct spi_slave' pointer passed at initialization is - * used to direct traffic to the correct SPI interface. This dirver does not + * used to direct traffic to the correct SPI interface. This driver does not * provide a way to instantiate multiple TPM devices. Also, to keep things * simple, the driver unconditionally uses of TPM locality zero. * @@ -159,7 +159,7 @@ static int start_transaction(int read_write, size_t bytes, unsigned int addr) /* * The first byte of the frame header encodes the transaction type - * (read or write) and transfer size (set to lentgh - 1), limited to + * (read or write) and transfer size (set to length - 1), limited to * 64 bytes. */ header.body[0] = (read_write ? 0x80 : 0) | 0x40 | (bytes - 1); @@ -188,7 +188,7 @@ static int start_transaction(int read_write, size_t bytes, unsigned int addr) * the last clock of the byte) is set to 1. * * Due to some SPI controllers' shortcomings (Rockchip comes to - * mind...) we trasmit the 4 byte header without checking the byte + * mind...) we transmit the 4 byte header without checking the byte * transmitted by the TPM during the transaction's last byte. * * We know that cr50 is guaranteed to set the flow control bit to 0 diff --git a/src/ec/compal/ene932/acpi/ec.asl b/src/ec/compal/ene932/acpi/ec.asl index f3fb9979fe..3242cceb36 100644 --- a/src/ec/compal/ene932/acpi/ec.asl +++ b/src/ec/compal/ene932/acpi/ec.asl @@ -118,7 +118,7 @@ Device (EC0) SWTO, 1, // SW Throttling (1=Active) ; AEh.6 TTHR, 1, // HW (THRM#) Throttling (1=Active) ; AEh.7 TTHM, 1, // TS_THERMAL(1:Throttling for thermal) ; AFh.0 - THTL, 1, // THROTTLING(1:Ctrl H/W throtting act) ; AFh.1 + THTL, 1, // THROTTLING(1:Ctrl H/W throttling act); AFh.1 , 2, // Reserved ; AFh.2-3 NPST, 4, // Number of P-State level ; AFh.4-7 CTMP, 8, // Current CPU Temperature ; B0h diff --git a/src/ec/google/chromeec/ec.h b/src/ec/google/chromeec/ec.h index ed9f4e43ba..743651b0f9 100644 --- a/src/ec/google/chromeec/ec.h +++ b/src/ec/google/chromeec/ec.h @@ -161,7 +161,7 @@ int crosec_command_proto(struct chromeec_command *cec_command, crosec_io_t crosec_io, void *context); /** - * Performs light verification of the EC<->AP communcation channel. + * Performs light verification of the EC<->AP communication channel. * * @return 0 on success, -1 on error */ @@ -330,7 +330,7 @@ struct usb_pd_port_caps { * Get role-based capabilities for a USB-PD port * * @param port Which port to get information about - * @param *power_role_cap The power-role capabillity of the port + * @param *power_role_cap The power-role capability of the port * @param *try_power_role_cap The Try-power-role capability of the port * @param *data_role_cap The data role capability of the port * @param *port_location Location of the port on the device diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h index e8b028f822..bbe34be71a 100644 --- a/src/ec/google/chromeec/ec_commands.h +++ b/src/ec/google/chromeec/ec_commands.h @@ -2856,7 +2856,7 @@ struct ec_params_motion_sense { */ struct __ec_todo_unpacked { /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. - * kb_wake_angle: angle to wakup AP. + * kb_wake_angle: angle to wake up AP. */ int16_t data; } kb_wake_angle; diff --git a/src/ec/google/wilco/commands.h b/src/ec/google/wilco/commands.h index a2163459e1..b70f949fcb 100644 --- a/src/ec/google/wilco/commands.h +++ b/src/ec/google/wilco/commands.h @@ -10,7 +10,7 @@ enum { KB_POWER_SMI = 0x04, /* Read but do not clear power state information */ KB_POWER_STATUS = 0x05, - /* Inform the EC aboout the reason host is turning off */ + /* Inform the EC about the reason host is turning off */ KB_POWER_OFF = 0x08, /* Control wireless radios */ KB_RADIO_CONTROL = 0x2b, diff --git a/src/ec/quanta/ene_kb3940q/acpi/ec.asl b/src/ec/quanta/ene_kb3940q/acpi/ec.asl index 9d8cc281f6..a14c737aad 100644 --- a/src/ec/quanta/ene_kb3940q/acpi/ec.asl +++ b/src/ec/quanta/ene_kb3940q/acpi/ec.asl @@ -75,7 +75,7 @@ Device (EC0) KBID, 1, // 0=EN KBD, 1=JP KBD ; 80h.1 , 6, // Reserved ; 80h.2-7 NPST, 8, // Number of P-State level ; 81h - MPST, 8, // Maxumum P-State ; 82h + MPST, 8, // Maximum P-State ; 82h KWAK, 1, // Keyboard WAKE(0=Disable,1=Enable) ; 83h.0 TWAK, 1, // TouchPad WAKE(0=Disable,1=Enable) ; 83h.1 , 1, // Reserved ; 83h.2 diff --git a/src/ec/quanta/it8518/acpi/battery.asl b/src/ec/quanta/it8518/acpi/battery.asl index 79a1da30e1..768f2b12e4 100644 --- a/src/ec/quanta/it8518/acpi/battery.asl +++ b/src/ec/quanta/it8518/acpi/battery.asl @@ -23,7 +23,7 @@ Device (BATX) 0, // 0: Power Unit 0xFFFFFFFF, // 1: Design Capacity 0xFFFFFFFF, // 2: Last Full Charge Capacity - 1, // 3: Battery Technology(Rechargable) + 1, // 3: Battery Technology(Rechargeable) 10800, // 4: Design Voltage 10.8V 0, // 5: Design capacity of warning 0, // 6: Design capacity of low diff --git a/src/ec/quanta/it8518/acpi/ec.asl b/src/ec/quanta/it8518/acpi/ec.asl index 093593cfce..36f966f94d 100644 --- a/src/ec/quanta/it8518/acpi/ec.asl +++ b/src/ec/quanta/it8518/acpi/ec.asl @@ -444,7 +444,7 @@ Device (EC0) MBTH, 4, // bit 3-0: battery 0 highest level SBTH, 4, // bit 7-4: battery 1 highest level // note: if highest level is 0 or 0xF, it means not defined - // (in this case, use default hightest level, it is 6) + // (in this case, use default highest level, it is 6) Offset(0xEF), // [EC Function Specification Major Version] Offset(0xF0), // [Build ID]~ offset:0F7h diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h index 01d10c2b20..2c9af3a56f 100644 --- a/src/include/acpi/acpi.h +++ b/src/include/acpi/acpi.h @@ -1267,7 +1267,7 @@ void acpi_create_slit(acpi_slit_t *slit, * proximimity domain for the memory. */ int acpi_create_hmat_mpda(acpi_hmat_mpda_t *mpda, u32 initiator, u32 memory); -/* Create Heterogenous Memory Attribute Table */ +/* Create Heterogeneous Memory Attribute Table */ void acpi_create_hmat(acpi_hmat_t *hmat, unsigned long (*acpi_fill_hmat)(unsigned long current)); diff --git a/src/include/cpu/x86/save_state.h b/src/include/cpu/x86/save_state.h index d6fcf63d79..139a5fa750 100644 --- a/src/include/cpu/x86/save_state.h +++ b/src/include/cpu/x86/save_state.h @@ -26,7 +26,7 @@ struct smm_save_state_ops { /* Return -1 on failure, otherwise returns which CPU node issued an APMC IO write */ int get_apmc_node(u8 cmd); -/* Return -1 on failure, 0 on succes. +/* Return -1 on failure, 0 on success. Accessors for the SMM save state CPU registers RAX, RBX, RCX and RDX */ int get_save_state_reg(const enum cpu_reg reg, const int node, void *out, const uint8_t length); int set_save_state_reg(const enum cpu_reg reg, const int node, void *in, const uint8_t length); diff --git a/src/include/device/i2c_simple.h b/src/include/device/i2c_simple.h index de1c0eb4b8..8f389b3107 100644 --- a/src/include/device/i2c_simple.h +++ b/src/include/device/i2c_simple.h @@ -35,7 +35,7 @@ int i2c_write_field(unsigned int bus, uint8_t slave, uint8_t reg, uint8_t data, /* * software_i2c is supposed to be a debug feature. It's usually not compiled in, - * but when it is it can be dynamically enabled at runtime for certain busses. + * but when it is it can be dynamically enabled at runtime for certain buses. * Need this ugly stub to arbitrate since I2C device drivers hardcode * 'i2c_transfer()' as their entry point. */ diff --git a/src/lib/device_tree.c b/src/lib/device_tree.c index 1fd8874047..3821e5cced 100644 --- a/src/lib/device_tree.c +++ b/src/lib/device_tree.c @@ -758,7 +758,7 @@ struct device_tree_node *dt_find_compat(struct device_tree_node *parent, } /* - * Find the next compatible child of a given parent. All children upto the + * Find the next compatible child of a given parent. All children up to the * child passed in by caller are ignored. If child is NULL, it considers all the * children to find the first child which is compatible. * diff --git a/src/lib/edid.c b/src/lib/edid.c index cd7a47ac78..55876e8a7c 100644 --- a/src/lib/edid.c +++ b/src/lib/edid.c @@ -433,7 +433,7 @@ detailed_block(struct edid *result_edid, unsigned char *x, int in_extension, /* * Slightly weird to return a global, but I've never - * seen any EDID block wth two range descriptors, so + * seen any EDID block with two range descriptors, so * it's harmless. */ return 1; @@ -481,7 +481,7 @@ detailed_block(struct edid *result_edid, unsigned char *x, int in_extension, We have no samples between those values, so put a threshold at 95000 kHz. If we get anything over 95000 kHz with single channel, we can make this - more sofisticated but it's currently not needed. + more sophisticated but it's currently not needed. */ out->mode.lvds_dual_channel = (out->mode.pixel_clock >= 95000); extra_info.x_mm = (x[12] + ((x[14] & 0xF0) << 4)); @@ -1094,7 +1094,7 @@ int set_display_mode(struct edid *edid, enum edid_modes mode) } /* - * Given a raw edid bloc, decode it into a form + * Given a raw edid block, decode it into a form * that other parts of coreboot can use -- mainly * graphics bringup functions. The raw block is * required to be 128 bytes long, per the standard, diff --git a/src/lib/nhlt.c b/src/lib/nhlt.c index 90a6cd9eef..a061b82864 100644 --- a/src/lib/nhlt.c +++ b/src/lib/nhlt.c @@ -126,7 +126,7 @@ struct nhlt_format *nhlt_add_format(struct nhlt_endpoint *endp, wave->channel_mask = speaker_mask; memcpy(&wave->sub_format, &pcm_subformat, sizeof(wave->sub_format)); - /* Calculate the dervied fields. */ + /* Calculate the derived fields. */ wave->block_align = wave->num_channels * wave->bits_per_sample / 8; wave->bytes_per_second = wave->block_align * wave->samples_per_second; diff --git a/src/lib/region_file.c b/src/lib/region_file.c index 4fe91b62bf..f3e66bfcfb 100644 --- a/src/lib/region_file.c +++ b/src/lib/region_file.c @@ -9,7 +9,7 @@ * A region file provides generic support for appending new data * within a storage region. The book keeping is tracked in metadata * blocks where an offset pointer points to the last byte of a newly - * allocated byte sequence. Thus, by taking 2 block offets one can + * allocated byte sequence. Thus, by taking 2 block offsets one can * determine start and size of the latest update. The data does not * have to be the same consistent size, but the data size has be small * enough to fit a metadata block and one data write within the region. |