diff options
| -rw-r--r-- | src/soc/amd/common/block/data_fabric/extended_mmio.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/soc/amd/common/block/data_fabric/extended_mmio.c b/src/soc/amd/common/block/data_fabric/extended_mmio.c index d0c3d9f051..a18d936381 100644 --- a/src/soc/amd/common/block/data_fabric/extended_mmio.c +++ b/src/soc/amd/common/block/data_fabric/extended_mmio.c @@ -10,13 +10,14 @@ void data_fabric_get_mmio_base_size(unsigned int reg, resource_t *mmio_base, { const uint32_t base_reg = data_fabric_broadcast_read32(DF_MMIO_BASE(reg)); const uint32_t limit_reg = data_fabric_broadcast_read32(DF_MMIO_LIMIT(reg)); - const union df_mmio_addr_ext ext_reg.raw = - data_fabric_broadcast_read32(DF_MMIO_ADDR_EXT(reg)); + const union df_mmio_addr_ext ext_reg = { + .raw = data_fabric_broadcast_read32(DF_MMIO_ADDR_EXT(reg)) + }; /* The raw register values in the base and limit registers are bits 47..16 of the actual address. The MMIO address extension register contains the extended MMIO base and limit bits starting with bit 48 of the actual address. */ *mmio_base = (resource_t)ext_reg.base_ext << DF_MMIO_EXT_ADDR_SHIFT | (resource_t)base_reg << DF_MMIO_SHIFT; - *mmio_limit = (resource_t)ext_reg.limit_ext << DF_MMIO_EXT_ADDR_SHIFT | - (((resource_t)limit_reg + 1) << DF_MMIO_SHIFT) - 1; + *mmio_limit = ((resource_t)ext_reg.limit_ext << DF_MMIO_EXT_ADDR_SHIFT | + (((resource_t)limit_reg + 1) << DF_MMIO_SHIFT)) - 1; } |