diff options
| -rw-r--r-- | src/cpu/amd/model_10xxx/defaults.h | 2 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/model_10xxx_init.c | 4 |
2 files changed, 4 insertions, 2 deletions
diff --git a/src/cpu/amd/model_10xxx/defaults.h b/src/cpu/amd/model_10xxx/defaults.h index 2fbfbb26fc..9a0e349e0a 100644 --- a/src/cpu/amd/model_10xxx/defaults.h +++ b/src/cpu/amd/model_10xxx/defaults.h @@ -91,7 +91,7 @@ static const struct { { BU_CFG2, AMD_DRBH_Cx , AMD_PTYPE_ALL, 0x00000000, 1 << (35-32), - 0x00000000, 1 << (35-32) }, /* Erratum 343 (set to 0 after CAR, in post_cache_as_ram() ) */ + 0x00000000, 1 << (35-32) }, /* Erratum 343 (set to 0 after CAR, in post_cache_as_ram()/model_10xxx_init() ) */ }; diff --git a/src/cpu/amd/model_10xxx/model_10xxx_init.c b/src/cpu/amd/model_10xxx/model_10xxx_init.c index 6f61fc37fd..a0e1f6fdbe 100644 --- a/src/cpu/amd/model_10xxx/model_10xxx_init.c +++ b/src/cpu/amd/model_10xxx/model_10xxx_init.c @@ -113,9 +113,11 @@ static void model_10xxx_init(device_t dev) msr.hi &= ~(1 << (46 - 32)); wrmsr(NB_CFG_MSR, msr); - /* Clear ClLinesToNbDis */ msr = rdmsr(BU_CFG2_MSR); + /* Clear ClLinesToNbDis */ msr.lo &= ~(1 << 15); + /* Clear bit 35 as per Erratum 343 */ + msr.hi &= ~(1 << (35-32)); wrmsr(BU_CFG2_MSR, msr); /* Write protect SMM space with SMMLOCK. */ |