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-rw-r--r--src/mainboard/facebook/monolith/devicetree.cb7
-rw-r--r--src/mainboard/google/eve/devicetree.cb1
-rw-r--r--src/mainboard/google/glados/devicetree.cb1
-rw-r--r--src/mainboard/google/poppy/variants/atlas/devicetree.cb1
-rw-r--r--src/mainboard/google/poppy/variants/baseboard/devicetree.cb1
-rw-r--r--src/mainboard/google/poppy/variants/nautilus/devicetree.cb1
-rw-r--r--src/mainboard/google/poppy/variants/nocturne/devicetree.cb1
-rw-r--r--src/mainboard/google/poppy/variants/rammus/devicetree.cb1
-rw-r--r--src/mainboard/google/poppy/variants/soraka/devicetree.cb1
-rw-r--r--src/mainboard/protectli/vault_kbl/devicetree.cb1
-rw-r--r--src/mainboard/purism/librem_skl/devicetree.cb1
-rw-r--r--src/mainboard/razer/blade_stealth_kbl/devicetree.cb5
12 files changed, 0 insertions, 22 deletions
diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb
index bf634c513d..4bc61dd6c9 100644
--- a/src/mainboard/facebook/monolith/devicetree.cb
+++ b/src/mainboard/facebook/monolith/devicetree.cb
@@ -40,13 +40,6 @@ chip soc/intel/skylake
register "SataSalpSupport" = "1"
register "SataPortsEnable" = "{
[0] = 1,
- [1] = 0,
- [2] = 0,
- [3] = 0,
- [4] = 0,
- [5] = 0,
- [6] = 0,
- [7] = 0,
}"
# Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch
diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb
index ec8a289684..a2b4311d1e 100644
--- a/src/mainboard/google/eve/devicetree.cb
+++ b/src/mainboard/google/eve/devicetree.cb
@@ -36,7 +36,6 @@ chip soc/intel/skylake
register "gen3_dec" = "0x00fc0901"
# FSP Configuration
- register "SataPortsEnable[0]" = "0"
register "DspEnable" = "1"
register "IoBufferOwnership" = "3"
register "ScsEmmcHs400Enabled" = "1"
diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb
index 995ed134f3..864d73e56d 100644
--- a/src/mainboard/google/glados/devicetree.cb
+++ b/src/mainboard/google/glados/devicetree.cb
@@ -35,7 +35,6 @@ chip soc/intel/skylake
register "dptf_enable" = "1"
# FSP Configuration
- register "SataPortsEnable[0]" = "0"
register "DspEnable" = "1"
register "IoBufferOwnership" = "3"
register "ScsEmmcHs400Enabled" = "1"
diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb
index 7817efd190..181c77b999 100644
--- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb
@@ -43,7 +43,6 @@ chip soc/intel/skylake
register "CmdTriStateDis" = "1"
# FSP Configuration
- register "SataPortsEnable[0]" = "0"
register "DspEnable" = "1"
register "IoBufferOwnership" = "3"
register "ScsEmmcHs400Enabled" = "1"
diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
index 0fc683d791..0317139b7c 100644
--- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
@@ -31,7 +31,6 @@ chip soc/intel/skylake
register "s0ix_enable" = true
# FSP Configuration
- register "SataPortsEnable[0]" = "0"
register "DspEnable" = "1"
register "IoBufferOwnership" = "3"
register "ScsEmmcHs400Enabled" = "1"
diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
index 02c832ce68..29233c9d2a 100644
--- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
@@ -40,7 +40,6 @@ chip soc/intel/skylake
register "s0ix_enable" = true
# FSP Configuration
- register "SataPortsEnable[0]" = "0"
register "DspEnable" = "1"
register "IoBufferOwnership" = "3"
register "ScsEmmcHs400Enabled" = "1"
diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
index fe6c1cbb68..1ef0b454ab 100644
--- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
@@ -36,7 +36,6 @@ chip soc/intel/skylake
register "CmdTriStateDis" = "1"
# FSP Configuration
- register "SataPortsEnable[0]" = "0"
register "DspEnable" = "1"
register "IoBufferOwnership" = "3"
register "ScsEmmcHs400Enabled" = "1"
diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb
index 4e291ac606..42528cfe0e 100644
--- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb
@@ -43,7 +43,6 @@ chip soc/intel/skylake
register "CmdTriStateDis" = "1"
# FSP Configuration
- register "SataPortsEnable[0]" = "0"
register "DspEnable" = "1"
register "IoBufferOwnership" = "3"
register "ScsEmmcHs400Enabled" = "1"
diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
index 641c5ca520..fb8aad2236 100644
--- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
@@ -40,7 +40,6 @@ chip soc/intel/skylake
register "s0ix_enable" = true
# FSP Configuration
- register "SataPortsEnable[0]" = "0"
register "DspEnable" = "1"
register "IoBufferOwnership" = "3"
register "ScsEmmcHs400Enabled" = "1"
diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb
index 2b3955cac6..b824fb4b1b 100644
--- a/src/mainboard/protectli/vault_kbl/devicetree.cb
+++ b/src/mainboard/protectli/vault_kbl/devicetree.cb
@@ -109,7 +109,6 @@ chip soc/intel/skylake
# Enable SATA ports 1,2
register "SataPortsEnable[0]" = "1"
register "SataPortsEnable[1]" = "1"
- register "SataPortsEnable[2]" = "0"
register "SataPortsDevSlp[0]" = "0"
register "SataPortsDevSlp[1]" = "0"
diff --git a/src/mainboard/purism/librem_skl/devicetree.cb b/src/mainboard/purism/librem_skl/devicetree.cb
index 20e204d83d..0083e641a5 100644
--- a/src/mainboard/purism/librem_skl/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/devicetree.cb
@@ -42,7 +42,6 @@ chip soc/intel/skylake
# FSP Configuration
register "SataPortsEnable[0]" = "1"
- register "SataPortsEnable[1]" = "0"
register "SataPortsEnable[2]" = "1"
register "SataPortsDevSlp[0]" = "0"
register "SataPortsDevSlp[2]" = "0"
diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
index 34ef3848c4..da44d22ab4 100644
--- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
+++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
@@ -22,11 +22,6 @@ chip soc/intel/skylake
register "dptf_enable" = "0"
# FSP Configuration
- register "SataPortsEnable" = "{
- [0] = 0,
- [1] = 0,
- [2] = 0,
- }"
register "DspEnable" = "0"
register "IoBufferOwnership" = "0"
register "SkipExtGfxScan" = "1"