diff options
| -rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_01000086.h | 164 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_0100009f.h | 163 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_010000b6.h | 164 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_010000bf.h | 164 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_010000c4.h | 159 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_010000c7.h | 164 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_010000c8.h | 164 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_010000d9.h | 164 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_010000db.h | 164 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/mc_patch_010000dc.h | 164 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/microcode_blob.c | 10 | ||||
| -rw-r--r-- | src/cpu/amd/model_10xxx/update_microcode.c | 30 |
12 files changed, 840 insertions, 834 deletions
diff --git a/src/cpu/amd/model_10xxx/mc_patch_01000086.h b/src/cpu/amd/model_10xxx/mc_patch_01000086.h deleted file mode 100644 index d5380366f2..0000000000 --- a/src/cpu/amd/model_10xxx/mc_patch_01000086.h +++ /dev/null @@ -1,164 +0,0 @@ -/* - ============================================================ - (c) Advanced Micro Devices, Inc., 2004-2008 - - The enclosed microcode is intended to be used with AMD - Microprocessors. You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ - - -0x08, 0x20, 0x01, 0x05, 0x86, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0x04, 0xde, 0x30, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x41, 0x10, 0x00, 0x00, 0x00, 0xaa, 0xaa, 0xaa, 0xa0, 0x09, 0x00, 0x00, -0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -0xff, 0xff, 0xff, 0xff, 0x97, 0xd1, 0x7f, 0x00, 0x83, 0x3f, 0x36, 0xc0, -0xa0, 0x1b, 0xf8, 0x13, 0x0e, 0xbf, 0x0c, 0xb4, 0xf2, 0x1f, 0xf8, 0xa7, -0x3c, 0xfc, 0x03, 0xfc, 0x40, 0x03, 0x54, 0x00, 0x92, 0xff, 0xe0, 0xbf, -0xe7, 0xe1, 0x1f, 0xe0, 0x5f, 0x9e, 0xfa, 0xff, 0x9f, 0x87, 0x7f, 0x80, -0x03, 0xf8, 0xff, 0xc6, 0x01, 0x0e, 0xfc, 0xbd, 0x00, 0xa0, 0x2a, 0x69, -0x1f, 0xc0, 0x7f, 0xe0, 0xe0, 0xdf, 0xf0, 0x0f, 0x7f, 0x00, 0xff, 0x81, -0x80, 0x7f, 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You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ - -0x08, 0x20, 0x17, 0x12, 0x9f, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0x8b, 0xb7, 0x4e, 0xd0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x62, 0x10, 0x00, 0x00, 0x00, 0xaa, 0xaa, 0xaa, 0x9a, 0x0b, 0x00, 0x00, -0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -0xff, 0xff, 0xff, 0xff, 0x6f, 0x58, 0x39, 0x00, 0x81, 0x3f, 0xa0, 0xd7, -0x04, 0x00, 0xfc, 0xb7, 0x0f, 0xff, 0x58, 0xf7, 0x72, 0xc0, 0xff, 0x6f, -0x3c, 0xfc, 0x03, 0xfc, 0xc0, 0x18, 0xd5, 0x00, 0x80, 0xff, 0x66, 0x3c, -0xeb, 0xc0, 0x9f, 0xd9, 0x4d, 0xee, 0xf8, 0xff, 0xff, 0x83, 0x7f, 0xa6, -0x07, 0xe8, 0xff, 0xff, 0xe8, 0x1f, 0xbe, 0xb5, 0x00, 0x60, 0x2f, 0x6a, -0x1f, 0xc0, 0x7f, 0xe0, 0xe0, 0xdf, 0xf0, 0x0f, 0x7f, 0x00, 0xff, 0x81, -0x80, 0x7f, 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You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ - - -0x09, 0x20, 0x31, 0x07, 0xb6, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0xe9, 0x98, 0xda, 0x6b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x43, 0x10, 0x00, 0x00, 0x00, 0xaa, 0xaa, 0xaa, 0x10, 0x0c, 0x00, 0x00, -0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -0xff, 0xff, 0xff, 0xff, 0x18, 0x80, 0x38, 0xc0, 0x83, 0x37, 0x80, 0xff, -0xb8, 0xff, 0xff, 0x13, 0x0e, 0xbf, 0x0c, 0xb6, 0x7a, 0xc4, 0xff, 0x2f, -0x3c, 0xfc, 0x6b, 0xfd, 0x40, 0x03, 0xd4, 0x00, 0x97, 0xff, 0xff, 0xff, -0xe7, 0xe1, 0x1f, 0xe0, 0x00, 0xfe, 0xbf, 0xf5, 0x9f, 0x87, 0x7e, 0x22, -0x01, 0xc6, 0x00, 0xc4, 0x7c, 0x1e, 0xfa, 0x01, 0x00, 0xe0, 0xff, 0x7b, -0x1f, 0xc0, 0x7f, 0xe0, 0xe0, 0xdf, 0xf0, 0x0f, 0x7f, 0x00, 0xff, 0x81, -0x80, 0x7f, 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You may copy, view and install the - enclosed microcode only for development and deployment of - firmware, BIOS, or operating system code for computer - systems that contain AMD processors. You are not - authorized to use the enclosed microcode for any other - purpose. - - THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR - IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO - WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, - TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES - ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. - AMD does not assume any responsibility for any errors which - may appear in this microcode or any other related - information provided to you by AMD, or result from use of - this microcode. AMD is not obligated to furnish, support, - or make any further information, software, technical - information, know-how, or show-how available related to this - microcode. - - The microcode is provided with "RESTRICTED RIGHTS." Use, - duplication, or disclosure by the U.S. Government is subject - to the restrictions as set forth in FAR 52.227-14 and - DFAR252.227-7013, et seq., or its successor. Use of the - microcode by the U.S. Government constitutes - acknowledgement of AMD's proprietary rights in them. - ============================================================ -*/ - - -0x10, 0x20, 0x17, 0x02, 0xbf, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, -0x42, 0x82, 0x02, 0x39, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0xa0, 0x10, 0x00, 0x00, 0x00, 0xaa, 0xaa, 0xaa, 0x74, 0x0f, 0x00, 0x00, -0xbe, 0x01, 0x00, 0x00, 0x33, 0x0e, 0x00, 0x00, 0xa9, 0x01, 0x00, 0x00, -0x75, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -0xff, 0xff, 0xff, 0xff, 0xa0, 0xfd, 0xff, 0x28, 0xc3, 0x3f, 0xc0, 0xcf, -0xff, 0x07, 0xe2, 0x01, 0x0f, 0xde, 0x50, 0xfe, 0xf2, 0xdf, 0xff, 0x0f, -0x3b, 0xfc, 0x01, 0xc5, 0x40, 0x03, 0xd4, 0x00, 0x80, 0xff, 0xfe, 0x7f, -0xfe, 0xe1, 0x1b, 0xc8, 0x5b, 0xf6, 0xff, 0xff, 0x7b, 0x87, 0x5f, 0xad, -0x6b, 0xf9, 0x6f, 0xfe, 0xfa, 0x1f, 0xfe, 0xb5, 0x00, 0x40, 0x11, 0x6a, -0x0e, 0xc0, 0x9b, 0x56, 0xe8, 0x75, 0xe0, 0x0f, 0x38, 0x00, 0xcf, 0xcc, -0xa0, 0xd7, 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this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ****************************************************************************** - */ - - -0x10, 0x20, 0x03, 0x03, 0xc4, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x01, -0x4a, 0xe0, 0x9c, 0x93, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x81, 0x10, 0x00, 0x00, 0x00, 0xaa, 0xaa, 0xaa, 0xa7, 0x0b, 0x00, 0x00, -0x14, 0x0c, 0x00, 0x00, 0x55, 0x03, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, -0x51, 0x03, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, -0xff, 0xff, 0xff, 0xff, 0x4f, 0xdf, 0x38, 0x00, 0x81, 0x3f, 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============================================================ + (c) Advanced Micro Devices, Inc., 2004-2010 + + The enclosed microcode is intended to be used with AMD + Microprocessors. You may copy, view and install the + enclosed microcode only for development and deployment of + firmware, BIOS, or operating system code for computer + systems that contain AMD processors. You are not + authorized to use the enclosed microcode for any other + purpose. + + THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR + IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO + WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, + TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES + ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. + AMD does not assume any responsibility for any errors which + may appear in this microcode or any other related + information provided to you by AMD, or result from use of + this microcode. AMD is not obligated to furnish, support, + or make any further information, software, technical + information, know-how, or show-how available related to this + microcode. + + The microcode is provided with "RESTRICTED RIGHTS." Use, + duplication, or disclosure by the U.S. Government is subject + to the restrictions as set forth in FAR 52.227-14 and + DFAR252.227-7013, et seq., or its successor. Use of the + microcode by the U.S. Government constitutes + acknowledgement of AMD's proprietary rights in them. + ============================================================ +*/ +// 1062h + +0x10, 0x20, 0x11, 0x03, 0xC7, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, +0xB8, 0x53, 0x63, 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x62, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0x9A, 0x0B, 0x00, 0x00, +0x16, 0x0C, 0x00, 0x00, 0x55, 0x03, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, +0x51, 0x03, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, +0xFF, 0xFF, 0xFF, 0xFF, 0x6F, 0x58, 0x39, 0x00, 0x81, 0x3F, 0xA0, 0xD7, +0x04, 0x00, 0xFC, 0xB7, 0x0F, 0xFF, 0x58, 0xF7, 0x72, 0xC0, 0xFF, 0x6F, +0x3C, 0xFC, 0x03, 0xFC, 0xC0, 0x18, 0xD5, 0x00, 0x80, 0xFF, 0x66, 0x3C, +0xEB, 0xC0, 0x9F, 0xD9, 0x4D, 0xEE, 0xF8, 0xFF, 0xFF, 0x83, 0x7F, 0xA6, +0x07, 0xE8, 0xFF, 0xFF, 0xE8, 0x1F, 0xBE, 0xB5, 0x00, 0x60, 0x2F, 0x6A, +0xBF, 0xE8, 0x04, 0xFF, 0xF5, 0xF3, 0xF0, 0xAF, 0x7A, 0x00, 0xFF, 0xD9, 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You may copy, view and install the + enclosed microcode only for development and deployment of + firmware, BIOS, or operating system code for computer + systems that contain AMD processors. You are not + authorized to use the enclosed microcode for any other + purpose. + + THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR + IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO + WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, + TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES + ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. + AMD does not assume any responsibility for any errors which + may appear in this microcode or any other related + information provided to you by AMD, or result from use of + this microcode. AMD is not obligated to furnish, support, + or make any further information, software, technical + information, know-how, or show-how available related to this + microcode. + + The microcode is provided with "RESTRICTED RIGHTS." Use, + duplication, or disclosure by the U.S. Government is subject + to the restrictions as set forth in FAR 52.227-14 and + DFAR252.227-7013, et seq., or its successor. Use of the + microcode by the U.S. Government constitutes + acknowledgement of AMD's proprietary rights in them. + ============================================================ +*/ +// 1043h + +0x10, 0x20, 0x11, 0x03, 0xC8, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, +0x6A, 0x99, 0x77, 0xEF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x43, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0x10, 0x0C, 0x00, 0x00, +0x55, 0x03, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x51, 0x03, 0x00, 0x00, +0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, +0xFF, 0xFF, 0xFF, 0xFF, 0x18, 0x80, 0x38, 0xC0, 0x83, 0x37, 0x80, 0xFF, +0xB8, 0xFF, 0xFF, 0x13, 0x0E, 0xBF, 0x0C, 0xB6, 0x7A, 0xC4, 0xFF, 0x2F, +0x3C, 0xFC, 0x6B, 0xFD, 0x40, 0x03, 0xD4, 0x00, 0x97, 0xFF, 0xFF, 0xFF, +0xE7, 0xE1, 0x1F, 0xE0, 0x00, 0xFE, 0xBF, 0xF5, 0x9F, 0x87, 0x7E, 0x22, +0x01, 0xC6, 0x00, 0xC4, 0x7C, 0x1E, 0xFA, 0x01, 0x00, 0xE0, 0xFF, 0x7B, +0x0E, 0x40, 0xBD, 0x55, 0xE0, 0x73, 0xD0, 0x0F, 0xFF, 0x00, 0xE0, 0xFF, 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You may copy, view and install the + enclosed microcode only for development and deployment of + firmware, BIOS, or operating system code for computer + systems that contain AMD processors. You are not + authorized to use the enclosed microcode for any other + purpose. + + THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR + IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO + WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, + TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES + ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. + AMD does not assume any responsibility for any errors which + may appear in this microcode or any other related + information provided to you by AMD, or result from use of + this microcode. AMD is not obligated to furnish, support, + or make any further information, software, technical + information, know-how, or show-how available related to this + microcode. + + The microcode is provided with "RESTRICTED RIGHTS." Use, + duplication, or disclosure by the U.S. Government is subject + to the restrictions as set forth in FAR 52.227-14 and + DFAR252.227-7013, et seq., or its successor. Use of the + microcode by the U.S. Government constitutes + acknowledgement of AMD's proprietary rights in them. + ============================================================ +*/ +//1081h + +0x11, 0x20, 0x12, 0x10, 0xD9, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, +0x6E, 0x87, 0xD2, 0xEA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x81, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0xA7, 0x0B, 0x00, 0x00, +0x14, 0x0C, 0x00, 0x00, 0x55, 0x03, 0x00, 0x00, 0x08, 0x0A, 0x00, 0x00, +0x51, 0x03, 0x00, 0x00, 0x0C, 0x0E, 0x00, 0x00, 0xC4, 0x07, 0x00, 0x00, +0x9A, 0x0B, 0x00, 0x00, 0x4F, 0xDF, 0x38, 0x00, 0x81, 0x3F, 0x20, 0xC0, +0x4E, 0xF0, 0xFF, 0xBF, 0x0F, 0xFF, 0x5E, 0x3F, 0xF0, 0xDF, 0xAD, 0x07, +0x3D, 0xF8, 0x7B, 0x7B, 0x80, 0x00, 0xD4, 0x00, 0x13, 0xF1, 0xFF, 0xFF, +0xAC, 0xE1, 0x1F, 0xE0, 0x4E, 0xFE, 0xBB, 0xFF, 0xFE, 0x87, 0x7F, 0xA7, +0x03, 0xF8, 0x7F, 0xD6, 0x7C, 0x1E, 0xFA, 0xBD, 0x00, 0xE0, 0xFF, 0x7B, +0x0E, 0x00, 0x3D, 0x57, 0xE0, 0x73, 0xD0, 0x0F, 0xFF, 0x2E, 0xFE, 0xFF, +0xC0, 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You may copy, view and install the + enclosed microcode only for development and deployment of + firmware, BIOS, or operating system code for computer + systems that contain AMD processors. You are not + authorized to use the enclosed microcode for any other + purpose. + + THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR + IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO + WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, + TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES + ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. + AMD does not assume any responsibility for any errors which + may appear in this microcode or any other related + information provided to you by AMD, or result from use of + this microcode. AMD is not obligated to furnish, support, + or make any further information, software, technical + information, know-how, or show-how available related to this + microcode. + + The microcode is provided with "RESTRICTED RIGHTS." Use, + duplication, or disclosure by the U.S. Government is subject + to the restrictions as set forth in FAR 52.227-14 and + DFAR252.227-7013, et seq., or its successor. Use of the + microcode by the U.S. Government constitutes + acknowledgement of AMD's proprietary rights in them. + ============================================================ +*/ +// 1041h + +0x11, 0x20, 0x24, 0x10, 0xDB, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, +0xB9, 0xE4, 0xBE, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x41, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0xA0, 0x09, 0x00, 0x00, +0xA5, 0x09, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xA1, 0x09, 0x00, 0x00, +0xFF, 0x09, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, +0xFF, 0xFF, 0xFF, 0xFF, 0x97, 0xD1, 0x7F, 0x00, 0x83, 0x3F, 0x36, 0xC0, +0xA0, 0x1B, 0xF8, 0x13, 0x0E, 0xBF, 0x0C, 0xB4, 0xF2, 0x1F, 0xF8, 0xA7, +0x3C, 0xFC, 0x03, 0xFC, 0x40, 0x03, 0x54, 0x00, 0x92, 0xFF, 0xE0, 0xBF, +0xE7, 0xE1, 0x1F, 0xE0, 0x5F, 0x9E, 0xFA, 0xFF, 0x9F, 0x87, 0x7F, 0x80, +0x03, 0xF8, 0xFF, 0xC6, 0x01, 0x0E, 0xFC, 0xBD, 0x00, 0xA0, 0x2A, 0x69, +0x0E, 0x40, 0xBD, 0x55, 0xE0, 0x73, 0xD0, 0x0F, 0xFF, 0x00, 0xE0, 0xFF, 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You may copy, view and install the + enclosed microcode only for development and deployment of + firmware, BIOS, or operating system code for computer + systems that contain AMD processors. You are not + authorized to use the enclosed microcode for any other + purpose. + + THE MICROCODE IS PROVIDED "AS IS" WITHOUT ANY EXPRESS OR + IMPLIED WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO + WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, + TITLE,FITNESS FOR ANY PARTICULAR PURPOSE, OR WARRANTIES + ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE. + AMD does not assume any responsibility for any errors which + may appear in this microcode or any other related + information provided to you by AMD, or result from use of + this microcode. AMD is not obligated to furnish, support, + or make any further information, software, technical + information, know-how, or show-how available related to this + microcode. + + The microcode is provided with "RESTRICTED RIGHTS." Use, + duplication, or disclosure by the U.S. Government is subject + to the restrictions as set forth in FAR 52.227-14 and + DFAR252.227-7013, et seq., or its successor. Use of the + microcode by the U.S. Government constitutes + acknowledgement of AMD's proprietary rights in them. + ============================================================ +*/ +// 10A0h + +0x11, 0x20, 0x24, 0x10, 0xDC, 0x00, 0x00, 0x01, 0x00, 0x80, 0x20, 0x00, +0x0C, 0x0B, 0x36, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0xA0, 0x10, 0x00, 0x00, 0x00, 0xAA, 0xAA, 0xAA, 0x74, 0x0F, 0x00, 0x00, +0xBE, 0x01, 0x00, 0x00, 0x33, 0x0E, 0x00, 0x00, 0xA9, 0x01, 0x00, 0x00, +0x75, 0x00, 0x00, 0x00, 0x73, 0x02, 0x00, 0x00, 0x55, 0x03, 0x00, 0x00, +0x51, 0x03, 0x00, 0x00, 0xA0, 0xFD, 0xFF, 0x28, 0xC3, 0x3F, 0xC0, 0xCF, +0xFF, 0x07, 0xE2, 0x01, 0x0F, 0xDE, 0x50, 0xFE, 0xF2, 0xDF, 0xFF, 0x0F, +0x3B, 0xFC, 0x01, 0xC5, 0x00, 0x03, 0xD4, 0x00, 0x80, 0xFF, 0xFE, 0x7F, +0xFE, 0xE1, 0x1B, 0xC8, 0x5B, 0xF6, 0xFF, 0xFF, 0x7B, 0x87, 0x5F, 0xAD, +0x6B, 0xF9, 0x6F, 0xFE, 0xFA, 0x1F, 0xFE, 0xB5, 0x00, 0x40, 0x11, 0x6A, +0x0E, 0xC0, 0x9B, 0x56, 0xE8, 0x75, 0xE0, 0x0F, 0x38, 0x00, 0xCF, 0xCC, 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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + +0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, +0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, diff --git a/src/cpu/amd/model_10xxx/microcode_blob.c b/src/cpu/amd/model_10xxx/microcode_blob.c index 524c48477e..f4c8438432 100644 --- a/src/cpu/amd/model_10xxx/microcode_blob.c +++ b/src/cpu/amd/model_10xxx/microcode_blob.c @@ -1,9 +1,9 @@ unsigned char microcode[] __attribute__ ((aligned(16))) = { -#include "mc_patch_01000086.h" +#include "mc_patch_010000c7.h" +#include "mc_patch_010000c8.h" +#include "mc_patch_010000d9.h" +#include "mc_patch_010000db.h" +#include "mc_patch_010000dc.h" #include "mc_patch_01000095.h" #include "mc_patch_01000096.h" -#include "mc_patch_0100009f.h" -#include "mc_patch_010000b6.h" -#include "mc_patch_010000bf.h" -#include "mc_patch_010000c4.h" }; diff --git a/src/cpu/amd/model_10xxx/update_microcode.c b/src/cpu/amd/model_10xxx/update_microcode.c index 8dcd90dd1a..25da838297 100644 --- a/src/cpu/amd/model_10xxx/update_microcode.c +++ b/src/cpu/amd/model_10xxx/update_microcode.c @@ -24,22 +24,22 @@ /* From the Revision Guide : * Equivalent Processor Table for AMD Family 10h Processors * - * Installed Processor Equivalent Processor Patch Level + * Installed Processor Equivalent Processor * Revision ID Revision ID - * 00100F00h 1000h 01000020h - * 00100F01h 1000h 01000020h - * 00100F02h 1000h 01000020h - * 00100F20h 1020h 01000096h - * 00100F21h (DR-B1) 1020h 01000096h - * 00100F2Ah (DR-BA) 1020h 01000096h - * 00100F22h (DR-B2) 1022h 01000095h - * 00100F23h (DR-B3) 1022h 01000095h - * 00100F42h (RB-C2) 1041h 01000086h - * 00100F43h (RB-C3) 1043h 010000b6h - * 00100F62h (DA-C2) 1062h 0100009Fh - * 00100F63h (DA-C3) 1043h 010000b6h - * 00100F81h (HY-D1) 1081h 010000c4h - * 00100FA0h (PH-E0) 10A0h 010000bfh + * 00100F00h 1000h + * 00100F01h 1000h + * 00100F02h 1000h + * 00100F20h 1020h + * 00100F21h (DR-B1) 1020h + * 00100F2Ah (DR-BA) 1020h + * 00100F22h (DR-B2) 1022h + * 00100F23h (DR-B3) 1022h + * 00100F42h (RB-C2) 1041h + * 00100F43h (RB-C3) 1043h + * 00100F62h (DA-C2) 1062h + * 00100F63h (DA-C3) 1043h + * 00100F81h (HY-D1) 1081h + * 00100FA0h (PH-E0) 10A0h */ struct id_mapping { |