diff options
| -rw-r--r-- | src/soc/intel/skylake/include/soc/ebda.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/skylake/memmap.c | 9 |
2 files changed, 6 insertions, 4 deletions
diff --git a/src/soc/intel/skylake/include/soc/ebda.h b/src/soc/intel/skylake/include/soc/ebda.h index 4cde5c0106..15a9d28a91 100644 --- a/src/soc/intel/skylake/include/soc/ebda.h +++ b/src/soc/intel/skylake/include/soc/ebda.h @@ -19,6 +19,7 @@ struct ebda_config { uint32_t signature; /* 0x00 - EBDA signature */ uint32_t tolum_base; /* 0x04 - coreboot memory start */ + uint32_t reserved_mem_size; /* 0x08 - chipset reserved memory size */ }; #endif diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c index eaf7d073ae..b7be21a9c7 100644 --- a/src/soc/intel/skylake/memmap.c +++ b/src/soc/intel/skylake/memmap.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2014 Google Inc. - * Copyright (C) 2015-2016 Intel Corporation. + * Copyright (C) 2015-2017 Intel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -285,12 +285,12 @@ static uintptr_t calculate_dram_base(size_t *reserved_mem_size) */ size_t soc_reserved_mmio_size(void) { - size_t chipset_mem_size; + struct ebda_config cfg; - calculate_dram_base(&chipset_mem_size); + retrieve_ebda_object(&cfg); /* Get Intel Reserved Memory Range Size */ - return chipset_mem_size; + return cfg.reserved_mem_size; } /* Fill up memory layout information */ @@ -299,6 +299,7 @@ void fill_soc_memmap_ebda(struct ebda_config *cfg) size_t chipset_mem_size; cfg->tolum_base = calculate_dram_base(&chipset_mem_size); + cfg->reserved_mem_size = chipset_mem_size; } void cbmem_top_init(void) |